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| author | Ben Skeggs <bskeggs@redhat.com> | 2014-09-01 10:44:57 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-10-02 13:25:44 +1000 |
| commit | d908293d1c278cb6c2a975b12957e4e49f884d0a (patch) | |
| tree | 63e59518db385a363121b9e02069f0d23b1877ba | |
| parent | 20b1e6f44c40bc0950d1c09497a1ac59bd5bf0ea (diff) | |
| download | nouveau-d908293d1c278cb6c2a975b12957e4e49f884d0a.tar.gz | |
fb/ram/gk104: skip table entry for mode we're already in
NVIDIA binary driver appears to, not sure if it's for a good reason, but
grasping at straws for some GDDR5 reclocking issues here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | nvkm/subdev/fb/ramnve0.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/nvkm/subdev/fb/ramnve0.c b/nvkm/subdev/fb/ramnve0.c index 9764792c3..caae9efc0 100644 --- a/nvkm/subdev/fb/ramnve0.c +++ b/nvkm/subdev/fb/ramnve0.c @@ -1173,18 +1173,19 @@ nve0_ram_init(struct nouveau_object *object) cnt = nv_ro08(bios, data + 0x14); /* guess at count */ data = nv_ro32(bios, data + 0x10); /* guess u32... */ - save = nv_rd32(pfb, 0x10f65c); - for (i = 0; i < cnt; i++) { - nv_mask(pfb, 0x10f65c, 0x000000f0, i << 4); - nvbios_exec(&(struct nvbios_init) { - .subdev = nv_subdev(pfb), - .bios = bios, - .offset = nv_ro32(bios, data), /* guess u32 */ - .execute = 1, - }); - data += 4; + save = nv_rd32(pfb, 0x10f65c) & 0x000000f0; + for (i = 0; i < cnt; i++, data += 4) { + if (i != save >> 4) { + nv_mask(pfb, 0x10f65c, 0x000000f0, i << 4); + nvbios_exec(&(struct nvbios_init) { + .subdev = nv_subdev(pfb), + .bios = bios, + .offset = nv_ro32(bios, data), + .execute = 1, + }); + } } - nv_wr32(pfb, 0x10f65c, save); + nv_mask(pfb, 0x10f65c, 0x000000f0, save); nv_mask(pfb, 0x10f584, 0x11000000, 0x00000000); switch (ram->base.type) { |