diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-07-07 18:47:00 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2014-10-31 11:47:40 +0900 |
| commit | cb01cb23aeaede63bd40b627d6d0bee7eabd0b67 (patch) | |
| tree | 2884687d6b82dce0eb294759c4e85189d6c01d8f | |
| parent | b9b0d7920be8a6b86bdc0aba558e29aca181f403 (diff) | |
| download | nouveau-cb01cb23aeaede63bd40b627d6d0bee7eabd0b67.tar.gz | |
drm: allocate GPFIFOs and fences coherently
Specify TTM_PL_FLAG_UNCACHED when allocating GPFIFOs and fences to
allow them to be safely accessed by the kernel without being synced
on non-coherent architectures.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
| -rw-r--r-- | drm/nouveau_chan.c | 2 | ||||
| -rw-r--r-- | drm/nv84_fence.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drm/nouveau_chan.c b/drm/nouveau_chan.c index 77c81d6b4..0f3da8684 100644 --- a/drm/nouveau_chan.c +++ b/drm/nouveau_chan.c @@ -102,7 +102,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, chan->drm = drm; /* allocate memory for dma push buffer */ - target = TTM_PL_FLAG_TT; + target = TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED; if (nouveau_vram_pushbuf) target = TTM_PL_FLAG_VRAM; diff --git a/drm/nv84_fence.c b/drm/nv84_fence.c index d6c6c87c3..4d79be755 100644 --- a/drm/nv84_fence.c +++ b/drm/nv84_fence.c @@ -246,8 +246,8 @@ nv84_fence_create(struct nouveau_drm *drm) if (ret == 0) ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0, - TTM_PL_FLAG_TT, 0, 0, NULL, NULL, - &priv->bo_gart); + TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED, 0, + 0, NULL, NULL, &priv->bo_gart); if (ret == 0) { ret = nouveau_bo_pin(priv->bo_gart, TTM_PL_FLAG_TT); if (ret == 0) { |