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| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-07-07 18:01:25 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2014-10-31 11:47:40 +0900 |
| commit | 9b374638cd12e3714b78fef1bc8a06527ca73c1a (patch) | |
| tree | 10407b0abcebdf6c89a7235d00aa261a4b385877 | |
| parent | 8bdeeef30a51cef4b028b2d5c89cc558988bfb61 (diff) | |
| download | nouveau-9b374638cd12e3714b78fef1bc8a06527ca73c1a.tar.gz | |
drm: introduce nv_device_is_cpu_coherent()
Add a function allowing us to know whether a device is CPU-coherent,
i.e. accesses performed by the CPU on GPU-mapped buffers will
be immediately visible on the GPU side and vice-versa.
For now, a device is considered to be coherent if it uses the PCI bus on
a non-ARM architecture.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
| -rw-r--r-- | lib/core/os.h | 2 | ||||
| -rw-r--r-- | nvkm/include/core/device.h | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/lib/core/os.h b/lib/core/os.h index fba954229..79462eb2c 100644 --- a/lib/core/os.h +++ b/lib/core/os.h @@ -101,6 +101,8 @@ typedef dma_addr_t resource_size_t; #define __printf(a,b) #define __user +#define IS_ENABLED(x) (0) + static inline int order_base_2(u64 base) { diff --git a/nvkm/include/core/device.h b/nvkm/include/core/device.h index 1d9d89392..0d839e1dd 100644 --- a/nvkm/include/core/device.h +++ b/nvkm/include/core/device.h @@ -158,6 +158,12 @@ nv_device_is_pci(struct nouveau_device *device) return device->pdev != NULL; } +static inline bool +nv_device_is_cpu_coherent(struct nouveau_device *device) +{ + return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device)); +} + static inline struct device * nv_device_base(struct nouveau_device *device) { |