diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2015-12-11 16:24:55 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2015-12-11 17:56:11 +0900 |
| commit | b0add1106206eedc01a7fd6f3a2a2774411ec259 (patch) | |
| tree | 3474fe6b5da35a822828059c52f3cc042b3d037c | |
| parent | 879e5ee1db1130f36784a260cb0155fb7e502559 (diff) | |
| download | nouveau-b0add1106206eedc01a7fd6f3a2a2774411ec259.tar.gz | |
gr/gm20b: warn if secure boot cannot be performed
| -rw-r--r-- | drm/nouveau/nvkm/engine/gr/gm20b.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drm/nouveau/nvkm/engine/gr/gm20b.c b/drm/nouveau/nvkm/engine/gr/gm20b.c index eabac5d1e..7872fb5e6 100644 --- a/drm/nouveau/nvkm/engine/gr/gm20b.c +++ b/drm/nouveau/nvkm/engine/gr/gm20b.c @@ -33,9 +33,14 @@ gm20b_gr_init_gpc_mmu(struct gf100_gr *gr) u32 val; /* Bypass MMU check for non-secure boot */ - if (!device->chip->secure_boot.managed_falcons) + if (!device->chip->secure_boot.managed_falcons) { nvkm_wr32(device, 0x100ce4, 0xffffffff); + if (nvkm_rd32(device, 0x100ce4) != 0xffffffff) + nvdev_warn(device, + "cannot bypass secure boot - expect failure soon!\n"); + } + val = nvkm_rd32(device, 0x100c80); val &= 0xf000087f; nvkm_wr32(device, 0x418880, val); |