diff options
Diffstat (limited to 'deps/v8/src/ia32/disasm-ia32.cc')
-rw-r--r-- | deps/v8/src/ia32/disasm-ia32.cc | 57 |
1 files changed, 52 insertions, 5 deletions
diff --git a/deps/v8/src/ia32/disasm-ia32.cc b/deps/v8/src/ia32/disasm-ia32.cc index 64305ef69..52c2b3848 100644 --- a/deps/v8/src/ia32/disasm-ia32.cc +++ b/deps/v8/src/ia32/disasm-ia32.cc @@ -685,7 +685,8 @@ int DisassemblerIA32::MemoryFPUInstruction(int escape_opcode, case 0xDD: switch (regop) { case 0: mnem = "fld_d"; break; - case 2: mnem = "fstp"; break; + case 1: mnem = "fisttp_d"; break; + case 2: mnem = "fst_d"; break; case 3: mnem = "fstp_d"; break; default: UnimplementedInstruction(); } @@ -717,6 +718,10 @@ int DisassemblerIA32::RegisterFPUInstruction(int escape_opcode, case 0xD9: switch (modrm_byte & 0xF8) { + case 0xC0: + mnem = "fld"; + has_register = true; + break; case 0xC8: mnem = "fxch"; has_register = true; @@ -957,6 +962,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, } else if (f0byte == 0xA2 || f0byte == 0x31) { AppendToBuffer("%s", f0mnem); data += 2; + } else if (f0byte == 0x28) { + data += 2; + int mod, regop, rm; + get_modrm(*data, &mod, ®op, &rm); + AppendToBuffer("movaps %s,%s", + NameOfXMMRegister(regop), + NameOfXMMRegister(rm)); + data++; } else if ((f0byte & 0xF0) == 0x80) { data += JumpConditional(data, branch_hint); } else if (f0byte == 0xBE || f0byte == 0xBF || f0byte == 0xB6 || @@ -1156,6 +1169,23 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, NameOfXMMRegister(regop), NameOfXMMRegister(rm)); data++; + } else if (*data == 0x73) { + data++; + int mod, regop, rm; + get_modrm(*data, &mod, ®op, &rm); + int8_t imm8 = static_cast<int8_t>(data[1]); + AppendToBuffer("psllq %s,%d", + NameOfXMMRegister(rm), + static_cast<int>(imm8)); + data += 2; + } else if (*data == 0x54) { + data++; + int mod, regop, rm; + get_modrm(*data, &mod, ®op, &rm); + AppendToBuffer("andpd %s,%s", + NameOfXMMRegister(regop), + NameOfXMMRegister(rm)); + data++; } else { UnimplementedInstruction(); } @@ -1168,12 +1198,12 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, { data++; int mod, regop, rm; get_modrm(*data, &mod, ®op, &rm); - if (mod == 3 && regop == ecx) { - AppendToBuffer("dec_b %s", NameOfCPURegister(rm)); + if (regop == ecx) { + AppendToBuffer("dec_b "); + data += PrintRightOperand(data); } else { UnimplementedInstruction(); } - data++; } break; @@ -1274,6 +1304,23 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, NameOfXMMRegister(rm)); data++; } + } else if (b2 == 0xC2) { + // Intel manual 2A, Table 3-18. + const char* const pseudo_op[] = { + "cmpeqsd", + "cmpltsd", + "cmplesd", + "cmpunordsd", + "cmpneqsd", + "cmpnltsd", + "cmpnlesd", + "cmpordsd" + }; + AppendToBuffer("%s %s,%s", + pseudo_op[data[1]], + NameOfXMMRegister(regop), + NameOfXMMRegister(rm)); + data += 2; } else { if (mod != 0x3) { AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop)); @@ -1367,7 +1414,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, " %s", tmp_buffer_.start()); return instr_len; -} +} // NOLINT (function is too long) //------------------------------------------------------------------------------ |