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| author | Ali Ijaz Sheikh <ofrobots@google.com> | 2016-04-07 14:06:55 -0700 |
|---|---|---|
| committer | James M Snell <jasnell@gmail.com> | 2016-04-26 12:16:03 -0700 |
| commit | a42453b08568f9b2b2b7474a4d0fb3b4e5e531e6 (patch) | |
| tree | e420165eb9bd9e3972af67730045066c3518a36f /deps/v8/src/mips/assembler-mips.h | |
| parent | e4abf8a135e7abc1519c7dd1d3ea2d00f236d242 (diff) | |
| download | node-new-a42453b08568f9b2b2b7474a4d0fb3b4e5e531e6.tar.gz | |
deps: upgrade V8 to 5.0.71.32
* Pick up the branch head for V8 5.0 stable [1]
* Edit v8 gitignore to allow trace_event copy
* Update V8 DEP trace_event as per deps/v8/DEPS [2]
[1] https://chromium.googlesource.com/v8/v8.git/+/3c67831
[2] https://chromium.googlesource.com/chromium/src/base/trace_event/common/+/4b09207e447ae5bd34643b4c6321bee7b76d35f9
Ref: https://github.com/nodejs/node/pull/5945
PR-URL: https://github.com/nodejs/node/pull/6111
Reviewed-By: targos - Michaël Zasso <mic.besace@gmail.com>
Reviewed-By: bnoordhuis - Ben Noordhuis <info@bnoordhuis.nl>
Reviewed-By: indutny - Fedor Indutny <fedor.indutny@gmail.com>
Diffstat (limited to 'deps/v8/src/mips/assembler-mips.h')
| -rw-r--r-- | deps/v8/src/mips/assembler-mips.h | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/deps/v8/src/mips/assembler-mips.h b/deps/v8/src/mips/assembler-mips.h index 054695483f..b708ef7700 100644 --- a/deps/v8/src/mips/assembler-mips.h +++ b/deps/v8/src/mips/assembler-mips.h @@ -304,6 +304,8 @@ struct FPUControlRegister { const FPUControlRegister no_fpucreg = { kInvalidFPUControlRegister }; const FPUControlRegister FCSR = { kFCSRRegister }; +// TODO(mips) Define SIMD registers. +typedef DoubleRegister Simd128Register; // ----------------------------------------------------------------------------- // Machine instruction Operands. @@ -518,14 +520,11 @@ class Assembler : public AssemblerBase { // a target is resolved and written. static const int kSpecialTargetSize = 0; - // Number of consecutive instructions used to store 32bit constant. - // Before jump-optimizations, this constant was used in - // RelocInfo::target_address_address() function to tell serializer address of - // the instruction that follows LUI/ORI instruction pair. Now, with new jump - // optimization, where jump-through-register instruction that usually - // follows LUI/ORI pair is substituted with J/JAL, this constant equals - // to 3 instructions (LUI+ORI+J/JAL/JR/JALR). - static const int kInstructionsFor32BitConstant = 3; + // Number of consecutive instructions used to store 32bit constant. This + // constant is used in RelocInfo::target_address_address() function to tell + // serializer address of the instruction that follows LUI/ORI instruction + // pair. + static const int kInstructionsFor32BitConstant = 2; // Distance between the instruction referring to the address of the call // target and the return address. @@ -1035,7 +1034,7 @@ class Assembler : public AssemblerBase { // Record a deoptimization reason that can be used by a log or cpu profiler. // Use --trace-deopt to enable. - void RecordDeoptReason(const int reason, const SourcePosition position); + void RecordDeoptReason(const int reason, int raw_position); static int RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, @@ -1206,6 +1205,12 @@ class Assembler : public AssemblerBase { return block_buffer_growth_; } + void EmitForbiddenSlotInstruction() { + if (IsPrevInstrCompactBranch()) { + nop(); + } + } + inline void CheckTrampolinePoolQuick(int extra_instructions = 0); private: |