ppc: Add configure test and macros to replace register names.

* aclocal.m4 (GMP_ASM_POWERPC_R_REGISTERS): New configure test,
adapted from corresponding test in GMP's acinlude.m4.
* configure.ac (ASM_PPC_WANT_R_REGISTERS): New substituted
variable. Set using GMP_ASM_POWERPC_R_REGISTERS, when powerpc64
assembly code is enabled.
* config.m4.in: Substituted here.
* powerpc64/machine.m4: Check ASM_PPC_WANT_R_REGISTERS, and
if needed, replace register names like r0, r1, ... with integers.
* Makefile.in (%.asm): Include m4-utils.m4 for preprocessing of .asm
files, and include config.m4 before machine.m4.

6 files changed, 55 insertions, 2 deletions

diff --git a/ChangeLog b/ChangeLog
index 4490da6e..f3426ef7 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -3,6 +3,17 @@
 	* m4-utils.m4: New file with m4 utilities, copied from GMP's
 	mpn/asm-defs.m4.
 	* Makefile.in (DISTFILES): Add m4-utils.m4.
+	(%.asm): Include m4-utils.m4 for preprocessing of .asm files, and
+	include config.m4 before machine.m4.
+
+	* aclocal.m4 (GMP_ASM_POWERPC_R_REGISTERS): New configure test,
+	adapted from corresponding test in GMP's acinlude.m4.
+	* configure.ac (ASM_PPC_WANT_R_REGISTERS): New substituted
+	variable. Set using GMP_ASM_POWERPC_R_REGISTERS, when powerpc64
+	assembly code is enabled.
+	* config.m4.in: Substituted here.
+	* powerpc64/machine.m4: Check ASM_PPC_WANT_R_REGISTERS, and
+	if needed, replace register names like r0, r1, ... with integers.
 
 2020-09-15  Niels Möller  <nisse@obsidian>
 
diff --git a/Makefile.in b/Makefile.in
index e766d23d..c10f3e9d 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -289,8 +289,8 @@ libhogweed.a: $(hogweed_OBJS)
 	$(RANLIB) $@
 	echo hogweed > libhogweed.stamp
 
-%.$(OBJEXT): %.asm $(srcdir)/asm.m4 machine.m4 config.m4
-	$(M4) $(srcdir)/asm.m4 machine.m4 config.m4 $< >$*.s
+%.$(OBJEXT): %.asm $(srcdir)/m4-utils.m4 $(srcdir)/asm.m4 config.m4 machine.m4
+	$(M4) $(srcdir)/m4-utils.m4 $(srcdir)/asm.m4 config.m4 machine.m4 $< >$*.s
 	$(COMPILE) -c $*.s
 
 %.$(OBJEXT): %.c
diff --git a/aclocal.m4 b/aclocal.m4
index 513b2df4..29aa5c3e 100644
--- a/aclocal.m4
+++ b/aclocal.m4
@@ -555,3 +555,27 @@ EOF
 	AC_SUBST(EXTRA_HOGWEED_LINKER_FLAGS)
   fi
 ])
+
+dnl  GMP_ASM_POWERPC_R_REGISTERS
+dnl  ---------------------------
+dnl  Determine whether the assembler takes powerpc registers with an "r" as
+dnl  in "r6", or as plain "6".  The latter is standard, but NeXT, Rhapsody,
+dnl  and MacOS-X require the "r" forms.
+dnl
+dnl  See also mpn/powerpc32/powerpc-defs.m4 which uses the result of this
+dnl  test.
+
+AC_DEFUN([GMP_ASM_POWERPC_R_REGISTERS],
+[AC_CACHE_CHECK([if the assembler needs r on registers],
+               gmp_cv_asm_powerpc_r_registers,
+[GMP_TRY_ASSEMBLE(
+[	$gmp_cv_asm_text
+	mtctr	6],
+[gmp_cv_asm_powerpc_r_registers=no],
+[GMP_TRY_ASSEMBLE(
+[	.text
+	mtctr	r6],
+[gmp_cv_asm_powerpc_r_registers=yes],
+[AC_MSG_ERROR([neither "mtctr 6" nor "mtctr r6" works])])])])
+ASM_PPC_WANT_R_REGISTERS="$gmp_cv_asm_powerpc_r_registers"
+])
diff --git a/config.m4.in b/config.m4.in
index f9b7ece4..d89325b8 100644
--- a/config.m4.in
+++ b/config.m4.in
@@ -10,6 +10,7 @@ define(`RODATA', `@ASM_RODATA@')dnl
 define(`WORDS_BIGENDIAN', `@ASM_WORDS_BIGENDIAN@')dnl
 define(`ASM_X86_ENDBR',`@ASM_X86_ENDBR@')dnl
 define(`ASM_X86_MARK_CET_ALIGN',`@ASM_X86_MARK_CET_ALIGN@')dnl
+define(`ASM_PPC_WANT_R_REGISTERS',`@ASM_PPC_WANT_R_REGISTERS@')dnl
 divert(1)
 @ASM_X86_MARK_CET@
 @ASM_MARK_NOEXEC_STACK@
diff --git a/configure.ac b/configure.ac
index 666b2f4a..e9983697 100644
--- a/configure.ac
+++ b/configure.ac
@@ -399,6 +399,7 @@ fi
 
 OPT_NETTLE_SOURCES=""
 FAT_TEST_LIST=""
+ASM_PPC_WANT_R_REGISTERS="n/a"
 
 # Select assembler code
 asm_path=
@@ -456,6 +457,7 @@ if test "x$enable_assembler" = xyes ; then
       ;;
     *powerpc64*)
       if test "$ABI" = 64 ; then
+	GMP_ASM_POWERPC_R_REGISTERS
 	asm_path="powerpc64"
 	if test "x$enable_fat" = xyes ; then
 	  asm_path="powerpc64/fat $asm_path"
@@ -588,6 +590,7 @@ else
   IF_ASM='#'
 fi
 AC_SUBST([IF_ASM])
+AC_SUBST([ASM_PPC_WANT_R_REGISTERS])
 
 AH_VERBATIM([HAVE_NATIVE],
 [/* Define to 1 each of the following for which a native (ie. CPU specific)
diff --git a/powerpc64/machine.m4 b/powerpc64/machine.m4
index 221fa523..ae161d79 100644
--- a/powerpc64/machine.m4
+++ b/powerpc64/machine.m4
@@ -34,3 +34,17 @@ C DATA_LOAD_VEC(VEC_DST, DATA_SRC, GPR)
 define(`DATA_LOAD_VEC',
 `ld $3,$2@got(2)
 lvx $1,0,$3')
+
+dnl  Usage: r0 ... r31, cr0 ... cr7
+dnl
+dnl  Registers names, either left as "r0" etc or mapped to plain 0 etc,
+dnl  according to the result of the GMP_ASM_POWERPC_REGISTERS configure
+dnl  test.
+
+ifelse(ASM_PPC_WANT_R_REGISTERS,no,`
+forloop(i,0,31,`deflit(`r'i,i)')
+forloop(i,0,31,`deflit(`v'i,i)')
+forloop(i,0,31,`deflit(`f'i,i)')
+forloop(i,0,7, `deflit(`cr'i,i)')
+')
+