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* BR3058845: mostly fix bogus warning with implicit operand size overrideVictor van den Elzen2010-11-211-0/+14
| | | | | | | | The implicit operand size override code didn't set the operand size prefix, which confused the size calculation code for the range check. The BITS 64 operand size calculation is still off, but "fixing" it by making it 32-bit unless REX.W is set breaks PUSH and maybe others.
* BR 3109604: Fix C4 vs C5 VEX form selection in calcsize()H. Peter Anvin2010-11-161-0/+9
| | | | | | calcsize() had the wrong criterion for when C5 prefixes are permitted (REX.R is permitted, REX.X is forbidden.) assemble() had the right test already. This caused symbol value errors.
* Add test-case for BR3066383Cyrill Gorcunov2010-09-181-0/+68
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* test/avx: remove deleted instructionsH. Peter Anvin2010-08-161-7/+0
| | | | | | Remove the deleted VPERMIL2 instructions. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* test: Add br3041451 testcaseCyrill Gorcunov2010-08-091-0/+59
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* test: Add automatizing annotations to imm64.asmCyrill Gorcunov2010-08-041-0/+4
| | | | | | | | | | | | H. Peter Anvin pointed | | Btw, test/imm64.asm needs test engine annotations. | Make it so. Reported-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* Revert "Improve process_ea and introduce -OL"H. Peter Anvin2010-07-251-37/+0
| | | | | | | | | | This reverts commit ac732cb6a599836bf4c988e59ac6de4498758c72. Resolved Conflicts: doc/nasmdoc.src Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Improve process_ea and introduce -OLVictor van den Elzen2010-07-241-0/+37
| | | | | | | | | | | | | | | | | | | Two fixes: 1. Optimization of [bx+0xFFFF] etc 0xFFFF is an sbyte under 16-bit semantics, so make sure to check it right. 2. Don't optimize displacements in -O0 Displacements that fit into an sbyte or can be removed should *not* be optimized in -O0. Implicit zero displacements are still optimized, e.g.: [eax] -> 0 bit displacement, [ebp] -> 8 bit displacement. However explicit displacements are not optimized: [eax+0] -> 32 bit displacement, [ebp+0] -> 32 bit displacement. Because #2 breaks compatibility with 0.98, I introduced a new optimization level: -OL, legacy.
* preproc.: Fix NULL dereference on broken %strlen argumentCyrill Gorcunov2010-07-231-0/+5
| | | | | | | | | Under particular circumstances %strlen may cause SIGSEG. A typical example is %strlen with nonexistent macro argument. [ Testcase test/strlen.asm ] Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: allow non-identifier character in environment variablesH. Peter Anvin2010-07-201-0/+31
| | | | | | | | Allow non-identifier characters in the name of environment variables, by surrounding them with string quotes (subject to ordinary string-quoting rules.) Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* Check in test for BR3028880Cyrill Gorcunov2010-07-131-0/+6
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: add another test caseCyrill Gorcunov2010-07-091-0/+12
| | | | | | Add another test case for preprocessor token pasting. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* Check in test case from bug report br3005117H. Peter Anvin2010-07-081-0/+24
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* br3026808: add test caseH. Peter Anvin2010-07-081-0/+18
| | | | | | Add test case for BR 3026808 (%assign %$local). Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add RD*SBASE, WR*SBASE, RDRAND from AVX v7H. Peter Anvin2010-07-061-0/+24
| | | | | | | Add the RD*SBASE, WR*SBASE and RDRAND instructions from version 7 of the AVX specification, Intel document 319433-007. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* BR2975768: Update AMD LWP instructions to match upcoming changesCyrill Gorcunov2010-03-251-0/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The former changes have been committed to binutils. From initial message: | | 2010-03-22 Quentin Neill <quentin.neill@amd.com> | Sebastian Pop <sebastian.pop@amd.com> | | opcodes/ | * i386-dis.c (OP_LWP_I): Removed. | (reg_table): Do not use OP_LWP_I, use Iq. | (OP_LWPCB_E): Remove use of names16. | (OP_LWP_E): Same. | * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns | should not set the Vex.length bit. | * i386-tbl.h: Regenerated. | | gas/ | * testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns. | * testsuite/gas/i386/lwp.s: Same. | * testsuite/gas/i386/x86-64-lwp.d: Updated. | * testsuite/gas/i386/lwp.d: Updated. | So there is no 16 bit instructions anymore. Also xop.l field should be set to 0. Based on patch from nasm64developer Reported-by: nasm64developer Signed-off-by: nasm64developer Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* BR 2496848: Tighten ea checksVictor van den Elzen2010-03-121-0/+42
| | | | | | | | | Check if the offset and the representation are equivalent. Disallow REL on absolute addresses. I'm not sure what that would mean and the output formats don't support it. Warn about ignored displacement size modifiers.
* test/Makefile: make it easier to inject optionsH. Peter Anvin2009-11-281-1/+1
| | | | | | Make it easier to inject options into test compiles. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Update test filesVictor van den Elzen2009-11-118-37/+9
| | | | Remove references to DREX instructions
* Add test/bisect.sh for use with "git bisect"Victor van den Elzen2009-11-112-1/+27
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* test: imul.asm: move warning-generated tests under WARNH. Peter Anvin2009-11-031-6/+6
| | | | | | Only make the tests under WARN actually issue warnings. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test: imul.asm: more IMUL pattern testsH. Peter Anvin2009-11-031-0/+27
| | | | | | Test more IMUL patterns. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test/Makefile: add more output rulesH. Peter Anvin2009-07-161-2/+15
| | | | | | Add more output rules to be able to try things quickly. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test/Makefile: add ith and srec targetsH. Peter Anvin2009-07-051-0/+6
| | | | | | Add ith and srec targets because, well, why not... Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test/Makefile: add rule to produce a .dbg fileH. Peter Anvin2009-06-271-0/+3
| | | | | | | Add a rule to produce a .dbg file, that is, a dump of all the calls to the back end. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* insns: make the MMX version of PINSRW match the SSE/AVX onesH. Peter Anvin2009-06-243-6/+21
| | | | | | | Make the MMX version of PINSRW match the SSE and AVX ones, and add it to the tests. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Fix the PINSR series of instructionsH. Peter Anvin2009-06-243-0/+157
| | | | | | Clean up a number of errors in the PINSR series instructions. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* preproc: unify token-pasting codeH. Peter Anvin2009-04-201-0/+4
| | | | | | | | Unify the token-pasting code between the macro expansion and the preprocessor parameter case. Parameterize whether or not to handle %+ tokens during expansion (%+ tokens have late binding semantics.) Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* BR 2760773: $$ tokensVictor van den Elzen2009-04-173-0/+0
| | | | | The tokenizer didn't handle $$, but relied on token pasting of two $ tokens. This broke after the improvements in 9bb46df4.
* preproc: fix more token pasting casesH. Peter Anvin2009-04-081-0/+11
| | | | | | | "+" can be a separate token that ends up having to get pulled into the middle of a floating-point constant. It's not even that strange. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Handle weird cases of token pastingH. Peter Anvin2009-04-071-0/+14
| | | | | | | | | | Especially when token pasting involves floating-point numbers, we can have some really strange effects from token pasting: for example, pasting the two tokens "xyzzy" and "1e+10" ends up with *three* tokens: "xyzzy1e" "+" "10". The easiest way to deal with this is to explicitly combine the string and then run tokenize() on it. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* FR 2499968: structures with non-zero base offsetVictor van den Elzen2009-03-271-0/+33
| | | | | Add an optional second argument to struc, document it and test it. Also removed trailing whitespace in nasmdoc.src in the process.
* Add test from BR 2690688H. Peter Anvin2009-03-171-0/+529
| | | | Add the test case from BR 2690688 to the test collection.
* optimization.asm: more sbyte testsH. Peter Anvin2009-02-261-0/+12
| | | | A few more sbyte optimization tests.
* optimization.asm: add sbyte testsH. Peter Anvin2009-02-261-0/+18
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* optimization.asm: add EA optimization testsH. Peter Anvin2009-02-261-0/+24
| | | | Add tests for EA optimizations
* Rename convergence.asm to optimization.asmVictor van den Elzen2009-02-251-3/+3
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* Do not confuse segmentless adresses and unknown forward referencesVictor van den Elzen2009-02-251-13/+26
| | | | Also be optimistic with immediate forward references.
* convergence.asm: add test of jmp to an absolute addressH. Peter Anvin2009-02-231-0/+3
| | | | | A JMP to an absolute address can't be short. Thus, we must not try to make it so.
* Add test file for optimal convergenceVictor van den Elzen2009-02-231-0/+34
| | | | | Some edge cases where starting with a long form converges suboptimally.
* Merge branch 'nasm-2.05.xx'H. Peter Anvin2008-11-061-0/+32
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| * test/popcnt.asm: simple test for the POPCNT instructionnasm-2.05.xxH. Peter Anvin2008-11-061-0/+32
| | | | | | | | | | | | Very simple test of POPCNT instructions. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | test: add test for BR 2222615H. Peter Anvin2008-11-041-0/+19
| | | | | | | | | | | | Add a test for %ifmacro, per BR 2222615. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | Merge branch 'indirect'H. Peter Anvin2008-10-235-34/+150
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| * test/ppindirect.asm: test token pasting inside %[...]indirectH. Peter Anvin2008-10-191-0/+3
| | | | | | | | | | | | Test for token pasting inside %[...]. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * test: better smartalign testsH. Peter Anvin2008-10-194-34/+108
| | | | | | | | | | | | Smartalign tests for 16, 32 and 64-bit mode. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * test: add test for preprocessor indirection constructH. Peter Anvin2008-10-191-0/+39
| | | | | | | | | | | | Add a test for the preprocessor indirection construct, %[...]. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | test/crc32.asm: test the CRC32 instructionH. Peter Anvin2008-10-231-0/+37
|/ | | | | | Test for the CRC32 instruction. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test/elf64so.asm: demonstrate a case where we bind to the wrong symbolH. Peter Anvin2008-10-171-1/+6
| | | | | | | | Show an artificial case where we bind to the wrong symbol, due to the confusion in the output system between the size of relative symbols and their position. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* test/Makefile: enable debugging info for elftest/elftest64H. Peter Anvin2008-10-171-6/+6
| | | | | | Enable debugging information for the ELF tests. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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