| Commit message (Collapse) | Author | Age | Files | Lines |
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The Intel FMA instructions are destructive, so relaxed forms are not
appropriate.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Two bugs with respect to the FMA instructions:
- the variant increment is supposed to be 0x10, not 0x01.
- the base opcode for scalar VFNMADD is 0x9d, not 0x9c
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The Perl script which auto-generated the VFM instructions had
incorrectly conflated the VEX.W and VEX.L bits, with the result that
only half the valid instructions were generated.
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Fix the spelling of the scalar VFNM instruction in genfma.pl, too,
just in case we need to pull this script out again...
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The FMA instructions aren't scheduled for Sandy Bridge after all.
They will be "in a future processor", so create a placeholder for now.
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Small perl script used to generate the FMA instruction patterns. May
come in useful if the spec changes again.
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