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* assemble.c: clean up whitespaceH. Peter Anvin2007-09-251-1/+1
| | | | Remove stray whitespace
* Auto-generate 0x67 prefixes without the need for \30x codesH. Peter Anvin2007-09-221-55/+107
| | | | | | | Auto-generate 0x67 prefixes without the need for \30x codes; the prefix is automatically added when there is a memory operand with address size differing from the current address size (and impossible combinations checked for.)
* Fix handling of DO; support unary + for floating-point numbersH. Peter Anvin2007-09-181-4/+9
| | | | | Floating-point users generally expect to be able to use a unary plus. Fix support for the DO instruction in several places.
* Implement "oword" (128 bits) as a first-class sizeH. Peter Anvin2007-09-181-0/+7
| | | | | | Implement oword, reso, do, as well as the SO flag to instructions. No instructions are actually flagged with SO yet, but this allows us to specify 128-bit sizes in instruction patterns.
* Actually generate SSE5 instructionsH. Peter Anvin2007-09-171-4/+15
| | | | | | | | | | This checkin completes what is required to actually generate SSE5 instructions. No support in the disassembler yet. This checkin covers: - Support for actually generating DREX prefixes. - Support for matching operand "operand X must match Y"
* Initial support for generating DREX suffixesH. Peter Anvin2007-09-171-2/+62
| | | | | | Initial support for generating DREX suffixes. Not used yet. No disassembler support yet, and no support for "operand X must match operand Y."
* Fix a few instances of missing renumbersH. Peter Anvin2007-09-171-2/+2
| | | | | parser.c: change hard-coded argument count 3 to MAX_ARGUMENTS assemble.c: change a few missed code renumbers
* Enable IF_AR3H. Peter Anvin2007-09-171-2/+0
| | | | Enable IF_AR3, which was incorrectly disabled in a previous checkin.
* Initial support for four arguments per instructionH. Peter Anvin2007-09-171-93/+152
| | | | For SSE5, we will need to support four arguments per instruction.
* Add (untested!) SSSE3, SSE4.1, SSE4.2 instructionsH. Peter Anvin2007-09-121-6/+11
| | | | | | | | | | Add the SSSE3, SSE4.1 and SSE4.2 instruction sets. Change \332 to be a literal 0xF2 prefix, by analog with \333 for 0xF3 prefix (the previous \332 flag changed to \335). This is necessary to get the REX prefix in the right place for instructions that use it. We are going to have to go in and change existing instruction patterns which use these, as well.
* Use enumerations where practical to ease debuggingH. Peter Anvin2007-09-121-1/+6
| | | | | | | | We have a lot of enumerations; by declaring fields as such, we make it easier when debugging, since the debugger can display the enumerations in cleartext. However, make sure exceptional values (like -1) are included in the enumeration, since the compiler otherwise may not include it in the valid range of the enumeration.
* Handle instructions which can have both REX.W and OSPH. Peter Anvin2007-09-111-5/+17
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* Make the big instruction arrays "const"H. Peter Anvin2007-09-111-6/+4
| | | | | Make the big instruction arrays "const", so they end up in readonly storage. While we're at it, move their prototypes into insns.h.
* assemble.c: correct special handing of ESP/RSPH. Peter Anvin2007-09-101-1/+1
| | | | | Correct the special handling of ESP/RSP (must be in the base register slot, but requires SIB.)
* Implement REL/ABS modifiersH. Peter Anvin2007-08-281-31/+7
| | | | | | Implement "REL" and "ABS" modifiers for offsets in 64-bit mode. This replaces "rip+XXX" type addressing. The infrastructure to set the default mode is there, but there is nothing to throw the switch just yet.
* Fixed RIP address processing ambiguity found by Charles Crayne.Keith Kanios2007-08-191-0/+1
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* Fixed issues with REX prefix effective address generation. Fixed XMM ↵Keith Kanios2007-08-171-21/+31
| | | | instruction output.
* More int/int32_t confusionH. Peter Anvin2007-07-071-2/+2
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* regflag() should return int32_t.H. Peter Anvin2007-07-071-1/+1
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* Support 32-bit direct addressing in 64-bit mode without base or index regsChuck Crayne2007-06-031-4/+14
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* Fix the handling of the \313 code.H. Peter Anvin2007-05-301-3/+2
| | | | | | \313 indicates a fixed 64-bit address size. It was incorrectly documented and incorrectly implemented in the assembler, and was unimplemented in the disassembler.
* Correct the generation of 67 prefixes.H. Peter Anvin2007-05-301-4/+4
| | | | | | The recent switch from register numbers (with -1 meaning "none") to register flags (with 0 meaning "none") broke the generation of 67 prefixes, especially in 64-bit mode.
* Remove bogus redundant testsH. Peter Anvin2007-05-301-22/+14
| | | | | | Remove tests that are bogus (they trigger for legitimate instructions.) The failure cases are okay anyway since they will be trapped by the REX generation logic.
* Remove bogus check for 64-bitnessH. Peter Anvin2007-05-301-8/+1
| | | | | | | Remove a bogus check for 64-bit operands. If appropriate, we will detect this during REX generation and will bail then. However, there are other instructions (floating point, MMX, ...) which are legitimately 64 bits in non-64-bit mode.
* Get rid of magic open-coded "register numbers"H. Peter Anvin2007-05-301-194/+196
| | | | | | | | | | Get rid of magic open-coded register numbers. We now keep track of a total of three different kinds of register numbers: the register enumeration (regs.h), the x86 register value, and the register flags. That has all the information we need. Additionally, do massive revamping of the EA generation code and the REX generation logic.
* Clean up the existing operand flag definitions, and documentH. Peter Anvin2007-05-291-1/+1
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* Fix the handling of \324 for computing the lengthH. Peter Anvin2007-04-181-6/+8
| | | | | | \324 means REX.W is mandatory, but that doesn't mean add a byte to the output! Instead, force REX.W set, and let the REX logic deal with the length.
* Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regsH. Peter Anvin2007-04-171-39/+66
| | | | | | | - MOV gpr,CRx or MOV CRx,gpr can access high control registers with a LOCK prefix; handle that in both the assembler and disassembler. - Get a saner error message when trying to access high resources in non-64-bit mode.
* Fixed 64-bit Mode Segment Selection.Keith Kanios2007-04-161-5/+19
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* Fixed distinction between [LOCAL]SYMBOL/IMMEDIATE for RIP-relative addressing.Keith Kanios2007-04-161-2/+2
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* Fixes for 64-bit ndisasm.H. Peter Anvin2007-04-161-2/+3
| | | | | This fixes some of the most glaring bugs in ndisasm 64-bit mode. We're still getting redundant prefixes for unknown reason, however.
* Fixed distinction between RIP relative symbols and immediate values.Keith Kanios2007-04-151-0/+2
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* Added DQ constants for all BITS modes.Keith Kanios2007-04-141-3/+3
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* Fixed support for DQ constants in long mode.Keith Kanios2007-04-141-1/+1
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* c99 printf/fprintf compliance.Keith Kanios2007-04-141-1/+1
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* Fixed distinction between char and int8_t data types.Keith Kanios2007-04-131-16/+16
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* Comment "REX.I" should have been "REX.X"Keith Kanios2007-04-131-2/+2
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* General push for x86-64 support, dubbed 0.99.00.Keith Kanios2007-04-121-292/+482
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* Apply Nindent to all .c and .h filesnasm-0.98.39LATESTH. Peter Anvin2005-01-151-1281/+1518
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* Cannot free "lnfname" since it's now static...H. Peter Anvin2003-09-081-1/+0
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* quick fix to -f obj debug format - put "static" back in assemble.cFrank Kotler2003-09-061-2/+11
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* Alexei's patch to allow "-I" paths to be searched for "incbin"ed filesFrank Kotler2003-08-271-2/+46
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* Fix offset computation in the presence of explicit prefixes.H. Peter Anvin2003-07-161-1/+1
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* Fix BR 632459: endianness errorH. Peter Anvin2002-11-101-2/+4
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* "const"-ipation fixes from Trevor WoernerH. Peter Anvin2002-09-121-8/+8
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* Added *1 case support for NOSPLIT ([NOSPLIT EAX] to generate SIB with dword ↵Debbie Wiles2002-06-081-0/+3
| | | | offset 0x0
* This is the "megapatch":H. Peter Anvin2002-06-061-28/+9
| | | | | | a) Automatically generate dependencies for all Makefiles; b) Move register definitions to a separate .dat file; c) Add support for "unimplemented but there in theory" registers.
* Deal with another case of address/operand size confusion, BR 560873H. Peter Anvin2002-05-271-5/+26
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* JMP instructions use the operand size prefix, not the address sizeH. Peter Anvin2002-05-211-8/+12
| | | | prefix, to determine the size of the jump target.
* Implement new "strict" keyword to inhibit optimization.H. Peter Anvin2002-05-211-4/+5
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