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* BR3058845: mostly fix bogus warning with implicit operand size overrideVictor van den Elzen2010-11-211-6/+16
| | | | | | | | The implicit operand size override code didn't set the operand size prefix, which confused the size calculation code for the range check. The BITS 64 operand size calculation is still off, but "fixing" it by making it 32-bit unless REX.W is set breaks PUSH and maybe others.
* BR 3109604: Fix C4 vs C5 VEX form selection in calcsize()H. Peter Anvin2010-11-161-1/+1
| | | | | | calcsize() had the wrong criterion for when C5 prefixes are permitted (REX.R is permitted, REX.X is forbidden.) assemble() had the right test already. This caused symbol value errors.
* assmemble.c: fix VEX.W logicH. Peter Anvin2010-08-161-2/+2
| | | | | | | Fix the generation logic for VEX.W, which unfortunately got the wrong constants. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* assemble: handle vex.ligH. Peter Anvin2010-08-161-4/+8
| | | | | | | AVX version 7 introduces the concept of .lig, meaning VEX.L is ignored. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* vex: change .wx to .wig to match the latest AVX specH. Peter Anvin2010-08-161-4/+4
| | | | | | | | Change the .wx (ignore the W field) to .wig, to match the latest version of the AVX specification. This is not a functional change, but just makes instruction patterns a little easier to write. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* assemble.c: Style nitfixCyrill Gorcunov2010-07-261-915/+916
| | | | | | Various tabs/space mixture cleaned and some more. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* Revert "Improve process_ea and introduce -OL"H. Peter Anvin2010-07-251-59/+40
| | | | | | | | | | This reverts commit ac732cb6a599836bf4c988e59ac6de4498758c72. Resolved Conflicts: doc/nasmdoc.src Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Use is_register helperCyrill Gorcunov2010-07-251-14/+8
| | | | | | Save us some line of code Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* Improve process_ea and introduce -OLVictor van den Elzen2010-07-241-40/+59
| | | | | | | | | | | | | | | | | | | Two fixes: 1. Optimization of [bx+0xFFFF] etc 0xFFFF is an sbyte under 16-bit semantics, so make sure to check it right. 2. Don't optimize displacements in -O0 Displacements that fit into an sbyte or can be removed should *not* be optimized in -O0. Implicit zero displacements are still optimized, e.g.: [eax] -> 0 bit displacement, [ebp] -> 8 bit displacement. However explicit displacements are not optimized: [eax+0] -> 32 bit displacement, [ebp+0] -> 32 bit displacement. Because #2 breaks compatibility with 0.98, I introduced a new optimization level: -OL, legacy.
* Permit short intersegment jumpsH. Peter Anvin2010-05-061-9/+13
| | | | | | | Allow an intersegment jump to be short (OUT_REL1ADR) if explicitly specified so by the user. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* Add support for one-byte relocationsH. Peter Anvin2010-05-061-12/+4
| | | | | | | | | Add OUT_REL1ADR (one-byte relative address) and support for OUT_ADDRESs with size == 1. Add support for it in outbin and outdbg. *It still needs to be added to other backends*, both the OUT_REL*ADR and OUT_ADDRESS codepaths need to be handled. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* BR 2496848: Tighten ea checksVictor van den Elzen2010-03-121-5/+27
| | | | | | | | | Check if the offset and the representation are equivalent. Disallow REL on absolute addresses. I'm not sure what that would mean and the output formats don't support it. Warn about ignored displacement size modifiers.
* BR2907058: insn_size - close file handle before returningCyrill Gorcunov2009-12-051-3/+5
| | | | | | | As example of such behaviour is when fseek fails for some reason. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* Comment out matches() operand flags logicCyrill Gorcunov2009-11-061-60/+83
| | | | | | Also space fix Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* matches: simplify check operand size actionsCyrill Gorcunov2009-11-031-5/+4
| | | | | | | | We may throw out j variable (since we break anyway) and don't assign asize for free (since we don't use it after). Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* nasmlib: Introduce idata_bytes helperCyrill Gorcunov2009-10-311-53/+5
| | | | | | This allow us to eliminate code duplication Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* continue using is_class helperCyrill Gorcunov2009-10-181-1/+1
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble: xsizeflags[] is an opflags_t variableH. Peter Anvin2009-10-131-1/+1
| | | | | | One more case of int32_t instead of opflags_t... Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* opflags: more int32_t -> opflags_t conversionsH. Peter Anvin2009-10-131-16/+15
| | | | | | | Hopefully this should catch all of them... but please keep an eye out for any other uses of int32_t for the operand flags. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble.c: check constants for overflowCyrill Gorcunov2009-10-131-17/+27
| | | | | | | | | | Lets check if a constant supplied to DB and etc does not overflow storage size and emit warning if needed. [ Bug #2857628 http://sourceforge.net/tracker/?func=detail&aid=2857628&group_id=6208&atid=106208 ] Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble.c: use is_class helperCyrill Gorcunov2009-10-131-3/+3
| | | | | | | | | | | is_class does not checking flags "strictly". Which means it may fail if type is specified to REGMEM and you check for is_class(MEMORY, ...). Anyway in current patch we check for REGISTER which doesn't overlap and it is safe to use is_class here. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* use opflags_t type for operandsCyrill Gorcunov2009-10-131-1/+1
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble: when looking for a REGISTER operand, do an exclusive testH. Peter Anvin2009-10-061-1/+1
| | | | | | | | | Do an "exclusive" test for a REGISTER operand when deciding to treat sizes as wildcards. "Exclusive" meaning don't just accept any class that could be REGISTER, but something that is strictly a part of the REGISTER class. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble: treat register operands without size as wildcardsH. Peter Anvin2009-10-051-5/+20
| | | | | | | | | | Register with no size are a bit special: we don't honor extrinsic register sizes in the first place ("oword xmm1" gives a warning, even), and they should match any xmmrm size. As such, explicitly handle sizeless register operands as a hard match, instead of relying on the fuzzy-matching mechanism to handle them. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Use I_none opcode instead of hardcoded numberCyrill Gorcunov2009-08-231-1/+1
| | | | | | | | Consolidate I_none opcode to be used everywhere instead of mix (-1,I_none). Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Merge commit 'cyr/hpa-list'H. Peter Anvin2009-07-301-2/+2
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| * assemble.c -- use list helpersCyrill Gorcunov2009-07-271-2/+2
| | | | | | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* | assemble.c: quiet warningH. Peter Anvin2009-07-271-0/+3
|/ | | | | | | Clear an uninitialized variable warning. The case can't actually happen, but the compiler doesn't know that. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble.c: clean up matches()H. Peter Anvin2009-07-261-79/+44
| | | | | | Simplify matches(), and quite possibly make it more correct. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble: defer "operand size missing" until end of type checkH. Peter Anvin2009-07-251-1/+5
| | | | | | | | | | | Defer the "operand size missing" error until we know all the other operands have the correct type. Otherwise we'll end up with false positives, which result in noise entered into the xsizeflags array, thus causing fuzzy matching to fail. It's possible we should defer it even further. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Enable fuzzy matching of operand sizesH. Peter Anvin2009-07-251-3/+46
| | | | | | | | | | | | | | This allows automatic fuzzy matching of operand sizes. If an operand size is not specified, but there is exactly one possible size for the instruction, select that instruction size. This requires a second pass through the instruction patterns, and so is slightly slower, but should be a lot easier to get right than the S- flags, and works even when there is more than one instruction. The new SX (Size eXact) flag can be used to prevent fuzzy matching completely. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble: move the instruction-matching loop into a common functionH. Peter Anvin2009-07-251-184/+203
| | | | | | | Move the instruction-matching loop into a common function. This gives us a single point to adjust the instruction-selection algorithm. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble: replace random integers with an enum for match resultsH. Peter Anvin2009-07-251-33/+53
| | | | | | | Match results were reported with random integers. Replace with an enum. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM: relicense under the 2-clause BSD licenseH. Peter Anvin2009-07-061-12/+0
| | | | | | | | *To the best of my knowledge*, we now have authorization from everyone who has significantly contributed to NASM in the past. As such, change the license to the 2-clause BSD license. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add copyright headers to the *.c/*.h files in the main directoryH. Peter Anvin2009-06-281-5/+46
| | | | | | | | | | Add copyright headers to the *.c/*.h files in the main directory. For files where I'm sure enough that we have all the approvals, I have given them the 2-BSD license, the others have been given the "LGPL for now" license header. Most of them can probably be changed after auditing. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* assemble.c: stylistic nitpickH. Peter Anvin2009-06-271-3/+2
| | | | | | Fix stylistic nitpick Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* ndisasm: fix disassembly of JRCXZH. Peter Anvin2009-06-261-1/+1
| | | | | | | Fix the disassembly of JRCXZ; in 64-bit mode, we should only accept JECXZ for disassembly with 32-bit address size override. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add support for instructions which always use low 8-bit registersH. Peter Anvin2009-06-241-1/+17
| | | | | | | | | Add a byte code to explicitly support instructions which only uses the low 8-bit registers (as if a REX prefix always was present.) This is usable for instructions which are officially documented as using "the low byte of a 32-bit register" and so on. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Infrastructure support for AMD's new XOP prefixH. Peter Anvin2009-05-031-10/+11
| | | | | | | Handle AMD's XOP prefixes; they use basically the same encoding as VEX prefixes, so treat them simply as a variant of VEX. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Most instruction codes are octal, so print errors that way tooH. Peter Anvin2009-03-011-2/+2
| | | | | Most of our instruction opcodes are written in octal. Thus, it makes sense to print them that way if we ever have an error message.
* sbyte: optimization is OK if UNKNOWN isn't setH. Peter Anvin2009-02-261-1/+1
| | | | We can optimize the sbytes if the UNKNOWN flag isn't set
* BR 2413265: don't pessimize displacementsH. Peter Anvin2009-02-261-1/+1
| | | | | | Optimize displacements, don't pessimize them. When running in the optimizer, we always keep track of when a reference is forward. That doesn't mean it is unknown.
* Do not confuse segmentless adresses and unknown forward referencesVictor van den Elzen2009-02-251-1/+1
| | | | Also be optimistic with immediate forward references.
* assemble: only be optimistic with NO_SEG if we're really in pass 1H. Peter Anvin2009-02-231-1/+1
| | | | | | | Only be optimistic about the reachability of a symbol with NO_SEG if we are truly in pass 1, i.e. it could possibly be just a forward reference. After we have done a single pass, if it is still NO_SEG, then it is an absolute symbol and need to be treated as such.
* BR 2420167: jmp not always optimizedVictor van den Elzen2009-02-231-0/+5
| | | | Begin by assuming short jumps are possible to prevent suboptimal convergence.
* BR 2592476: Treat WAIT as a prefix even though it's really an instructionH. Peter Anvin2009-02-211-0/+12
| | | | | | WAIT is technically an instruction, but from an assembler standpoint it behaves as if it had been a prefix. In particular, it has to be ordered *before* any real hardware prefixes.
* Unify all-zero buffers; add fwritezero()H. Peter Anvin2009-02-211-4/+1
| | | | | | | | We have a number of all-zero buffers in the code. Put a single all-zero buffer in nasmlib.c. Additionally, add fwritezero() which can be used to write an arbitrary number of all-zero bytes; this prevents the situation where the all-zero buffer is simply too small.
* BR 2432826: Fix enforcement of the LONG bitH. Peter Anvin2008-12-291-4/+5
| | | | | Somewhere we lost the enforcement of the LONG bit, as opposed to NOLONG. Fix this in the most obvious way.
* BR 2413272: Warn about byte displacement overflowVictor van den Elzen2008-12-101-12/+7
| | | | | Remove the special case for single byte displacements, which was already in out() anyway.
* assemble: use opx and opy in a few more placesH. Peter Anvin2008-10-251-4/+6
| | | | | | Use opx and opy in a few more places where we can do so. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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