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* insns.pl: Various style polyshingphiCyrill Gorcunov2012-12-041-80/+82
| | | | | | | | | - convert tabs to spaces - align octal opcodes No func changes. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble: Make emit_rex being a functionCyrill Gorcunov2012-12-031-10/+16
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble: Use case3/4 where appropriateCyrill Gorcunov2012-12-031-16/+5
| | | | | | This allows to shrink code a bit. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* assemble: Add case3 helperCyrill Gorcunov2012-12-031-1/+2
| | | | Signed-off-by: cyrill <cyrill@cyrills-MacBook-Pro.local>
* process_ea: Drop redundant variableCyrill Gorcunov2012-12-011-5/+1
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* regs: Introduce KNC (Xeon Phi) registersCyrill Gorcunov2012-11-292-0/+12
| | | | | | | | | | This patch introduces ZMM0-31 and K0-7 registers. N.B.: This is initial approach thus everything might be changed with time, thus this commit is to get foot wet with new encodings. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* BR3392232: Fix relocations in MachO64Keith Kanios2012-11-281-1/+1
| | | | | Signed-off-by: Keith Kanios <keith@kanios.net> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* output: Add more Elf unificationCyrill Gorcunov2012-11-162-26/+24
| | | | | | | | One day the elf output routines would be abstracted enough to be merged in one file. This patch simply removes some differences from elf32/64 code. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* BR3392231: Fix get_closest_section_symbol_by_offsetCyrill Gorcunov2012-11-061-23/+6
| | | | | | | | | This patch changes get_closest_section_symbol_by_offset logic to lookup only the closest symbols which are at or before the supplied offset. Signed-off-by: Keith Kanios <keith@kanios.net> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* BR3392226 preproc: Rework line readin procedureCyrill Gorcunov2012-10-271-57/+56
| | | | | | | | | It's been reported that we handle MacOS eol wrong. This patch fixes the problem. http://bugzilla.nasm.us/show_bug.cgi?id=3392226 Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* doc/changes.src: Update to include recent changes.H. Peter Anvin2012-10-081-0/+7
| | | | Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* BR 3327107: fix assembly of VPCMPGTQMarat Dukhan2012-10-081-1/+1
| | | | | | Fix incorrect instruction encoding for VPCMPGTQ. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* insns.dat: Mark the immediate for shift instructions as imm8H. Peter Anvin2012-09-251-32/+32
| | | | | | | | | | | | Allow the form: mov <rm>,byte 1 ... to generate the explicit byte form. An unfortunate side effect is that disassembly is ugly; this could be fixed by making a special byte code that acts the same for the assembler but disassembles specially. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* BR 3392227: Remove SB flag from SHIFT rm,immH. Peter Anvin2012-09-251-32/+32
| | | | | | | | | | | | | | | | Remove the SB flag from the rm,imm forms of the shift/rotate instructions; presumably the intent was to mark the immediate as a byte immediate, but it instead caused the memory operand to be accepted without a size, but generate the incorrect code as a result. Note: it would be good to modify the UNITY filter so that the explicit form: shl eax,byte 1 ... forces the imm form rather than the ,1 form. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* opflags: Rework opflags bits with OP_ macrosCyrill Gorcunov2012-09-161-163/+163
| | | | | | | | | | | | | | | | | | | | | | | In this path the opflags bits are completely reworked in a sake of simplier extension. Inparticular for Knights Corener instructions we will need new registers and new sizes. What's done - all bits are grouped in sequences, and start using OP_ macros, thus if one need to extend some field -- just tune up @shift and @bits where needed - the #define we use in code are OR'ed in symbols, this should be a way more convenient to deal with instead of pure hex numbers. The tests are passed but more eyes needed to review this rather big and intrusive patch. The reason why it's done in one single path -- for revertability in one command. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* opflags: Introduce opflags generating macrosCyrill Gorcunov2012-09-161-0/+4
| | | | | | | | | | | This patch introduces two macros - OP_GENMASK, to generate masks in opflags - OP_GENBIT, to generate bit at specified position we will use them with extended 64 bits opflags. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* opflags: Drop never used REG_RIP/REG_EIPCyrill Gorcunov2012-09-161-3/+0
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* When generate dependency names internally, quote filenamesH. Peter Anvin2012-09-093-5/+18
| | | | | | | Quote filenames for Make when generated for filenames internally. Only skip quoting when using the -MT option (rather than -MQ). Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* changes.src: fix grammar error (support -> supports)H. Peter Anvin2012-09-091-1/+1
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* opflags: Extend opflags_t to 64 bitsCyrill Gorcunov2012-09-103-88/+89
| | | | | | | | | | Soon we will need to encode 512 bits values thus there is no space left in our opflags_t which is 32 bitfield. Extend it to 64 bits width. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* NASM 2.10.05nasm-2.10.05H. Peter Anvin2012-09-091-1/+1
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* changes.src: Document CLAC/STACH. Peter Anvin2012-09-091-0/+4
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add CLAC and STAC instructions from AVX spec 014 (319433-014)H. Peter Anvin2012-09-091-0/+4
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM 2.10.04nasm-2.10.04H. Peter Anvin2012-08-181-1/+1
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* changes.src: List of changes for the next releaseH. Peter Anvin2012-08-171-0/+12
| | | | | | Prepare a list of changes for a 2.10.04 release. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* Add back the 256-bit form of the VORPD instructionH. Peter Anvin2012-08-171-0/+1
| | | | | | | The 256-bit form of the VORPD instruction was deleted in checkin 89a38dac363c45d5309001a710f8cf44e7833f81, apparently by mistake. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* BR 3392207: preproc: Rewrite paste_tokens routineCyrill Gorcunov2012-08-071-97/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | This should make it easier to read and moreover now we're able to preprocess pasting as %define N 1e%++%+ 5 dd N, 1e+5 Note that N should be expanded as series of pasting to 1e+5 term, but before this patch we were ending up in 1e+%+ 5 which is wrong. In other words the fixed version output is dd 1e+5, 1e+5 while broken one was dd 1e+%+ 5, 1e+5 This patch also fixes nil dereferences in case if there is no left or right token around pasting term. http://bugzilla.nasm.us/show_bug.cgi?id=3392207 Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* BR 3392218: Disassemble 82h opcodesH. Peter Anvin2012-07-281-0/+8
| | | | | | | | The 82h opcodes are undocumented aliases for the 80h opcodes, except in 64-bit mode. We don't generate them, but let the disassembler handle them correctly. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM 2.10.03nasm-2.10.03H. Peter Anvin2012-07-221-1/+1
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* doc: document XRELEASE MOV fixH. Peter Anvin2012-07-221-0/+10
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* hle: opcode A2 forbidden with HLE prefixesH. Peter Anvin2012-07-222-1/+5
| | | | | | | | | | | The moffset opcodes A2 and A3 do not support HLE. Unfortunately checkin fb3f4e6d HLE: Change NOHLE to be an instruction flag ... inadvertently lost the NOHLE flag for opcode A2. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM 2.10.02nasm-2.10.02H. Peter Anvin2012-07-201-1/+1
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* changes: add changes since 2.10.01H. Peter Anvin2012-07-201-0/+7
| | | | | | ilog2*() and new instructions. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* doc: document ifunc()H. Peter Anvin2012-07-201-8/+44
| | | | Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* isnsn.dat: add norexw to instructions with only 32- and 64-bit formsH. Peter Anvin2012-07-201-6/+6
| | | | | | | Add norexw to the 32-bit versions of instructions with only 32- and 64-bit forms (66 ignored as a size override.) Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* insns.dat: new instructions from the 013 AVX specH. Peter Anvin2012-07-131-0/+9
| | | | | | | | | | | New instructions (ADCX, ADOX, RDSEED) from the 013 AVX spec (Intel® Architecture Instruction Set Extensions Programming Reference). Note: ADCX in 64-bit mode disassembles incorrectly with a 64-bit argument. This still needs to be fixed before a 2.10.02 release. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* test: ilog2() testH. Peter Anvin2012-05-311-0/+271
| | | | | | Test for the ilog2 function/macros. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* eval: add general support for "integer functions" and add ilog2*()H. Peter Anvin2012-05-314-2/+110
| | | | | | | | | | | | | | | | Add general support in the function parser for "integer functions" (actually implemented as special unary operators, then wrapped in macros) and implement a family of integer logarithms. The only difference is the behavior on a non-power-of-two argument: ilog2[e] -- throw an error ilog2w -- throw a warning ilog2f -- round down to power of 2 ilog2c -- round up to power of 2 This is useful for back-converting from masks to bit values. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM 2.10.01nasm-2.10.01Cyrill Gorcunov2012-05-251-1/+1
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* docs: Update changes for 2.10.01Cyrill Gorcunov2012-05-251-0/+4
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* insns.dat: Add VPMOVMSKB reg32,ymmreg instructionCyrill Gorcunov2012-05-241-0/+1
| | | | | Reported-by: Jasper Neumann <sirrida@web.de> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: Move NOP preprocessor into separate fileCyrill Gorcunov2012-05-078-152/+206
| | | | | | No need to carry it in nasm.c, let it be more modular. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: Split get rid of global preproc methodsCyrill Gorcunov2012-05-074-28/+76
| | | | | | | This will allow to hook on updated preprocessor without breaking existing one. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: Drop never used pp_runtimeCyrill Gorcunov2012-05-062-21/+0
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: Use bsii helperCyrill Gorcunov2012-05-021-18/+1
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* nasmlib: Shrink idata_bytesCyrill Gorcunov2012-05-021-20/+9
| | | | Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* phash.sh: Use int() for the size of the hash tableH. Peter Anvin2012-03-261-1/+1
| | | | | | Pass the hash table size to int() to make it a bit more sane. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* NASM 2.10nasm-2.10H. Peter Anvin2012-03-121-1/+1
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* help: Print that -Ox is a default optimization levelCyrill Gorcunov2012-03-111-2/+2
| | | | | Reported-by: Frank Kotler <fbkotler@myfairpoint.net> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
* preproc: Finally drop context-through searchCyrill Gorcunov2012-03-111-62/+15
| | | | | | | | | | [backport 290eac75699fb768fdea4588772cf08b5db2788c] 2.09 series was the last one we support context-thru search (and we were issuing a warning about that) so drop all-context from get_ctx() routine. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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