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authorEric Christopher <echristo@apple.com>2006-03-02 18:35:09 +0000
committerEric Christopher <echristo@apple.com>2006-03-02 18:35:09 +0000
commitaa348dec7d6c5366efd10513ae4ff6fa2bbbd6ed (patch)
tree04a35fbf0dbba379bca0f8fdf007434f7da43176 /insns.h
parent1e0de6e913af8c1e9d65121c880960752fd4f190 (diff)
downloadnasm-aa348dec7d6c5366efd10513ae4ff6fa2bbbd6ed.tar.gz
Add VMX instructions.nasm-0.98.x
Diffstat (limited to 'insns.h')
-rw-r--r--insns.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/insns.h b/insns.h
index 92c23d02..8de7d97a 100644
--- a/insns.h
+++ b/insns.h
@@ -27,8 +27,8 @@ struct itemplate {
unsigned long flags; /* some flags */
};
-/*
- * this define is used to signify the end of an itemplate
+/*
+ * this define is used to signify the end of an itemplate
*/
#define ITEMPLATE_END {-1,-1,{-1,-1,-1},NULL,0}
@@ -78,6 +78,7 @@ struct itemplate {
#define IF_SSE 0x00010000UL /* it's a SSE (KNI, MMX2) instruction */
#define IF_SSE2 0x00020000UL /* it's a SSE2 instruction */
#define IF_SSE3 0x00040000UL /* it's a SSE3 (PNI) instruction */
+#define IF_VMX 0x00080000UL /* it's a VMX instruction */
#define IF_PMASK 0xFF000000UL /* the mask for processor types */
#define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */
/* also the highest possible processor */