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author | H. Peter Anvin <hpa@zytor.com> | 2007-12-26 19:10:20 -0800 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2007-12-26 19:10:20 -0800 |
commit | 9e9a24253a56ad94014d5848bf4ad91ccd6cd1fb (patch) | |
tree | 94543880dccf8f8fad8c851bf4f93b39d5ebf78d /disasm.c | |
parent | 292c615a95712b5bafa037b5a27ec026d4ee9e55 (diff) | |
download | nasm-9e9a24253a56ad94014d5848bf4ad91ccd6cd1fb.tar.gz |
disasm: 32-bit index registers were displayed as 64 bits
Fix bug where 32-bit index registers got incorrectly displayed as 64
bits:
00000000 678B040B mov eax,[ebx+rcx]
00000004 678B044B mov eax,[ebx+rcx*2]
00000008 678B045B mov eax,[ebx+rbx*2]
Diffstat (limited to 'disasm.c')
-rw-r--r-- | disasm.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -325,7 +325,7 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize, else if (a64) op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)]; else - op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)]; + op->indexreg = rd_reg32[index | ((rex & REX_X) ? 8 : 0)]; if (base == 5 && mod == 0) { op->basereg = -1; |