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authorH. Peter Anvin <hpa@linux.intel.com>2010-08-16 14:56:33 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2010-08-16 14:56:33 -0700
commit421059c6897ad5fae3bfcba8e3db0844cf80ae4e (patch)
treef5ca82d1c7521badeb78d8ef7b2f2cee5d253111 /assemble.c
parent978c2170fc22224bec916c692c627c88b53b829f (diff)
downloadnasm-421059c6897ad5fae3bfcba8e3db0844cf80ae4e.tar.gz
assemble: handle vex.lig
AVX version 7 introduces the concept of .lig, meaning VEX.L is ignored. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'assemble.c')
-rw-r--r--assemble.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/assemble.c b/assemble.c
index 76cf4393..37769340 100644
--- a/assemble.c
+++ b/assemble.c
@@ -92,7 +92,11 @@
*
* VEX/XOP prefixes are followed by the sequence:
* \tmm\wlp where mm is the M field; and wlp is:
- * 00 0ww lpp
+ * 00 wwl lpp
+ * [l0] ll = 0 for L = 0 (.128, .lz)
+ * [l1] ll = 1 for L = 1 (.256)
+ * [lig] ll = 2 for L don't care (always assembled as 0)
+ *
* [w0] ww = 0 for W = 0
* [w1 ] ww = 1 for W = 1
* [wig] ww = 2 for W don't care (always assembled as 0)
@@ -1130,16 +1134,16 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
errfunc(ERR_NONFATAL, "cannot use high register in vex instruction");
return -1;
}
- switch (ins->vex_wlp & 030) {
+ switch (ins->vex_wlp & 060) {
case 000:
case 020:
ins->rex &= ~REX_W;
break;
- case 010:
+ case 040:
ins->rex |= REX_W;
bad32 &= ~REX_W;
break;
- case 030:
+ case 060:
/* Follow REX_W */
break;
}