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| author | H. Peter Anvin <hpa@zytor.com> | 2007-09-18 15:24:38 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2007-09-18 15:24:38 -0700 |
| commit | 76815bf60b5db3bb0f9711920562ea4afc3f5c85 (patch) | |
| tree | eb3cb5585c85a26f92789b56d971c1562723d304 | |
| parent | 19e201053689be68d0e45077fa86e9538d74daa1 (diff) | |
| download | nasm-76815bf60b5db3bb0f9711920562ea4afc3f5c85.tar.gz | |
Remove 0FC2 from list of instruction prefixes
0FC2 is not really an instruction prefix; it's the opcode for
CMPPS/CMPSS, which takes a control immediate which Intel chose to have
opcode aliases for. However, we can't dispatch on a tail byte, so
it's useless.
| -rw-r--r-- | insns.pl | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -9,7 +9,7 @@ # Opcode prefixes which need their own opcode tables # LONGER PREFIXES FIRST! -@disasm_prefixes = qw(0F0F 0F24 0F25 0F38 0F3A 0F7A 0FC2 0F); +@disasm_prefixes = qw(0F0F 0F24 0F25 0F38 0F3A 0F7A 0F); print STDERR "Reading insns.dat...\n"; |