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| author | H. Peter Anvin <hpa@zytor.com> | 2010-07-07 17:20:19 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2010-07-07 17:20:19 -0700 |
| commit | 3a014348ca15913f89a07fef6119e9ba59db9040 (patch) | |
| tree | 4305aaa955a98425030be1cc4ead3bccf48f82db | |
| parent | 9eb663c087256d7f3fd7cd8ae37a496a636503c8 (diff) | |
| download | nasm-3a014348ca15913f89a07fef6119e9ba59db9040.tar.gz | |
insns: add FXSAVE64/FXRSTOR64, drop np prefix
Add FXSAVE64 and FXRSTOR64; drop the np prefix on 0F AE instructions:
none of the rest of the 0F AE instructions have them, and there are no
conflicts.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| -rw-r--r-- | insns.dat | 16 |
1 files changed, 9 insertions, 7 deletions
@@ -1510,20 +1510,22 @@ UNPCKLPS xmmreg,xmmrm \360\2\x0F\x14\110 KATMAI,SSE XORPS xmmreg,xmmrm \360\2\x0F\x57\110 KATMAI,SSE ;# Introduced in Deschutes but necessary for SSE support -FXRSTOR mem \2\x0F\xAE\201 P6,SSE,FPU -FXSAVE mem \2\x0F\xAE\200 P6,SSE,FPU +FXRSTOR mem [m: 0f ae /1] P6,SSE,FPU +FXRSTOR64 mem [m: o64 0f ae /1] X64,SSE,FPU +FXSAVE mem [m: 0f ae /0] P6,SSE,FPU +FXSAVE64 mem [m: o64 0f ae /0] X64,SSE,FPU ;# XSAVE group (AVX and extended state) ; Introduced in late Penryn ... we really need to clean up the handling ; of CPU feature bits. XGETBV void \360\3\x0F\x01\xD0 NEHALEM XSETBV void \360\3\x0F\x01\xD1 NEHALEM,PRIV -XSAVE mem [m: np 0f ae /4] NEHALEM +XSAVE mem [m: 0f ae /4] NEHALEM XSAVE64 mem [m: o64 0f ae /4] LONG,NEHALEM -XSAVEOPT mem [m: np 0f ae /6] FUTURE -XSAVEOPT64 mem [m: o64 np 0f ae /6] LONG,FUTURE -XRSTOR mem [m: np 0f ae /5] NEHALEM -XRSTOR64 mem [m: o64 np 0f ae /5] LONG,NEHALEM +XSAVEOPT mem [m: 0f ae /6] FUTURE +XSAVEOPT64 mem [m: o64 0f ae /6] LONG,FUTURE +XRSTOR mem [m: 0f ae /5] NEHALEM +XRSTOR64 mem [m: o64 0f ae /5] LONG,NEHALEM ; These instructions are not SSE-specific; they are ;# Generic memory operations |