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| author | H. Peter Anvin (Intel) <hpa@zytor.com> | 2018-06-25 23:09:38 -0700 |
|---|---|---|
| committer | H. Peter Anvin (Intel) <hpa@zytor.com> | 2018-06-25 23:09:38 -0700 |
| commit | 8df822f79f9e01736ccecd8bf5f8cdc4aaa90b59 (patch) | |
| tree | 8501bcbaa3b8dea94046063fd079193227448683 | |
| parent | d558598ebe15279f346f748e8581de24ca63a0c1 (diff) | |
| download | nasm-8df822f79f9e01736ccecd8bf5f8cdc4aaa90b59.tar.gz | |
insns.dat: add Intel Software Guard Extensions (SGX) instructions
Add SGX instructions ENCLS, ENCLU, ENCLV.
Bug report: https://bugzilla.nasm.us/show_bug.cgi?id=3392492
Reported-by: ff_ff <qqqqqqqqqfffffffff@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
| -rw-r--r-- | x86/insns-iflags.ph | 1 | ||||
| -rw-r--r-- | x86/insns.dat | 5 |
2 files changed, 6 insertions, 0 deletions
diff --git a/x86/insns-iflags.ph b/x86/insns-iflags.ph index 1042f0f5..c5311c6c 100644 --- a/x86/insns-iflags.ph +++ b/x86/insns-iflags.ph @@ -150,6 +150,7 @@ my %insns_flag_bit = ( "AVX512VPOPCNTDQ" => [$f++, "AVX-512 VPOPCNTD/VPOPCNTQ"], "AVX5124FMAPS" => [$f++, "AVX-512 4-iteration multiply-add"], "AVX5124VNNIW" => [$f++, "AVX-512 4-iteration dot product"], + "SGX" => [$f++, "Intel Software Guard Extensions (SGX)"], # Put these last "OBSOLETE" => [$f++, "Instruction removed from architecture"], diff --git a/x86/insns.dat b/x86/insns.dat index 01d82dc6..e9e45567 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -5342,6 +5342,11 @@ V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.lig.f2.0f38.w0 ab / V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 53 /r] AVX5124VNNIW,FUTURE,SO V4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem [rvm:m128:evex.dds.512.f2.0f38.w0 52 /r] AVX5124VNNIW,FUTURE,SO +;# Intel Software Guard Extensions (SGX) +ENCLS void [ np 0f 01 cf] SGX,FUTURE +ENCLU void [ np 0f 01 d7] SGX,FUTURE +ENCLV void [ np 0f 01 c0] SGX,FUTURE + ;# Systematic names for the hinting nop instructions ; These should be last in the file HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC |