diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2017-09-27 15:54:35 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2017-09-27 15:55:57 -0700 |
| commit | 81fd01f9d02a53e0254e585e7a8240164b7628e9 (patch) | |
| tree | 8e0c4895daff0de58550783d0d1c9cd8844e45ef | |
| parent | 59d5291a3a3390d729456b9ec40dcaf42eb05ea7 (diff) | |
| download | nasm-81fd01f9d02a53e0254e585e7a8240164b7628e9.tar.gz | |
BR 3392362: generate RMI versions of PEXTRW when possible
We could generate the MRI version (SSE 4.1) instead of the RMI
(SSE 2) version of these instructions if a 64-bit register was given
as the destination.
Reported-by: Vasiliy Olekhov <olekhov@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| -rw-r--r-- | test/pextrw.asm | 3 | ||||
| -rw-r--r-- | x86/insns.dat | 10 |
2 files changed, 9 insertions, 4 deletions
diff --git a/test/pextrw.asm b/test/pextrw.asm new file mode 100644 index 00000000..41c50b7a --- /dev/null +++ b/test/pextrw.asm @@ -0,0 +1,3 @@ + bits 64 + + pextrw rax,xmm0,0 diff --git a/x86/insns.dat b/x86/insns.dat index 00f25711..e6404f53 100644 --- a/x86/insns.dat +++ b/x86/insns.dat @@ -1701,8 +1701,10 @@ PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r] WILLAMETTE,SSE2,SO PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r] WILLAMETTE,SSE2,SO PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r] WILLAMETTE,SSE2,SO PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u] WILLAMETTE,SSE2,SB,AR2 +PEXTRW reg64,xmmreg,imm [rmi: 66 0f c5 /r ib,u] X64,SSE2,SB,AR2,ND PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2 PINSRW xmmreg,reg32,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2,ND +PINSRW xmmreg,reg64,imm [rmi: 66 0f c4 /r ib,u] X64,SSE2,SB,AR2,ND PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2 PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2 PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r] WILLAMETTE,SSE2,SO @@ -1955,8 +1957,8 @@ PBLENDW xmmreg,xmmrm,imm [rmi: 66 0f 3a 0e /r ib,u] SSE41 PCMPEQQ xmmreg,xmmrm [rm: 66 0f 38 29 /r] SSE41 PEXTRB reg32,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41 PEXTRB mem8,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41 -PEXTRB reg64,xmmreg,imm [mri: o64 66 0f 3a 14 /r ib,u] SSE41,X64 -PEXTRD rm32,xmmreg,imm [mri: norexw 66 0f 3a 16 /r ib,u] SSE41 +PEXTRB reg64,xmmreg,imm [mri: o64nw 66 0f 3a 14 /r ib,u] SSE41,X64 +PEXTRD rm32,xmmreg,imm [mri: norexw 66 0f 3a 16 /r ib,u] SSE41 PEXTRQ rm64,xmmreg,imm [mri: o64 66 0f 3a 16 /r ib,u] SSE41,X64 PEXTRW reg32,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41 PEXTRW mem16,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41 @@ -1965,8 +1967,8 @@ PHMINPOSUW xmmreg,xmmrm [rm: 66 0f 38 41 /r] SSE41 PINSRB xmmreg,mem,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2 PINSRB xmmreg,rm8,imm [rmi: nohi 66 0f 3a 20 /r ib,u] SSE41,SB,AR2 PINSRB xmmreg,reg32,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2 -PINSRD xmmreg,mem,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2 -PINSRD xmmreg,rm32,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2 +PINSRD xmmreg,mem,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2 +PINSRD xmmreg,rm32,imm [rmi: norexw 66 0f 3a 22 /r ib,u] SSE41,SB,AR2 PINSRQ xmmreg,mem,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2 PINSRQ xmmreg,rm64,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2 PMAXSB xmmreg,xmmrm [rm: 66 0f 38 3c /r] SSE41 |