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| author | Cyrill Gorcunov <gorcunov@gmail.com> | 2009-12-16 15:44:58 +0300 |
|---|---|---|
| committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2009-12-16 18:50:22 +0300 |
| commit | a2c4abb6333ac9b73a89e930ad554f0a1bf98293 (patch) | |
| tree | cebfcd04676704a0c3c01e2b67e975b704ba2a6b | |
| parent | 78debd0a570df16452a9075da3f7e7f850818596 (diff) | |
| download | nasm-a2c4abb6333ac9b73a89e930ad554f0a1bf98293.tar.gz | |
insns.dat: Restore default size of memory operands
During conversion of size of memory operands into
explicit form the compatibility with 2.07 has been
broken (for a small set of instructions). Lets restore
it. Details below.
This is due to specifics of our "fuzzy logic" algorithm.
For example consider the user wrote an instruction like
VCVTTPD2DQ xmm0,[eax]
the last operand is memory reference. But template contains
the following two items (written in simplified form)
VCVTTPD2DQ xmmreg,mem128
VCVTTPD2DQ xmmreg,mem256
So this is impossible to find out what _exactly_ user meant:
either reference to 128 bit value in memory or 256 bit.
As a solution we've been using IF_Sx modifier written in
template which allows to choose "by-default" template
and break the tie.
Reported-by: Victor van den Elzen <victor.vde@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
| -rw-r--r-- | insns.dat | 44 |
1 files changed, 22 insertions, 22 deletions
@@ -1111,16 +1111,16 @@ SAL rm64,imm \324\1\xC1\204\25 X64,ND,SB SALC void \1\xD6 8086,UNDOC SAR rm8,unity \1\xD0\207 8086 SAR rm8,reg_cl \1\xD2\207 8086 -SAR rm8,imm8 \1\xC0\207\25 186 +SAR rm8,imm \1\xC0\207\25 186,SB SAR rm16,unity \320\1\xD1\207 8086 SAR rm16,reg_cl \320\1\xD3\207 8086 -SAR rm16,imm8 \320\1\xC1\207\25 186 +SAR rm16,imm \320\1\xC1\207\25 186,SB SAR rm32,unity \321\1\xD1\207 386 SAR rm32,reg_cl \321\1\xD3\207 386 -SAR rm32,imm8 \321\1\xC1\207\25 386 +SAR rm32,imm \321\1\xC1\207\25 386,SB SAR rm64,unity \324\1\xD1\207 X64 SAR rm64,reg_cl \324\1\xD3\207 X64 -SAR rm64,imm8 \324\1\xC1\207\25 X64 +SAR rm64,imm \324\1\xC1\207\25 X64,SB SBB mem,reg8 \1\x18\101 8086,SM SBB reg8,reg8 \1\x18\101 8086 SBB mem,reg16 \320\1\x19\101 8086,SM @@ -2188,13 +2188,13 @@ VCVTDQ2PD ymmreg,xmmrm128 [rm: vex.256.f3.0f e6 /r] AVX,SANDYBRIDGE VCVTDQ2PS xmmreg,xmmrm128 [rm: vex.128.0f 5b /r] AVX,SANDYBRIDGE VCVTDQ2PS ymmreg,ymmrm256 [rm: vex.256.0f 5b /r] AVX,SANDYBRIDGE VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE -VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE,SO VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE -VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE,SY VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE -VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE,SO VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE -VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE,SY VCVTPS2DQ xmmreg,xmmrm128 [rm: vex.128.66.0f 5b /r] AVX,SANDYBRIDGE VCVTPS2DQ ymmreg,ymmrm256 [rm: vex.256.66.0f 5b /r] AVX,SANDYBRIDGE VCVTPS2PD xmmreg,xmmrm64 [rm: vex.128.0f 5a /r] AVX,SANDYBRIDGE @@ -2202,19 +2202,19 @@ VCVTPS2PD ymmreg,xmmrm128 [rm: vex.256.0f 5a /r] AVX,SANDYBRIDGE VCVTSD2SI reg32,xmmrm64 [rm: vex.128.f2.0f.w0 2d /r] AVX,SANDYBRIDGE VCVTSD2SI reg64,xmmrm64 [rm: vex.128.f2.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG VCVTSD2SS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.128.f2.0f 5a /r] AVX,SANDYBRIDGE -VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.128.f2.0f.w0 2a /r] AVX,SANDYBRIDGE -VCVTSI2SD xmmreg,xmmreg*,mem32 [rvm: vex.nds.128.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,ND -VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.128.f2.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG -VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.128.f3.0f.w0 2a /r] AVX,SANDYBRIDGE -VCVTSI2SS xmmreg,xmmreg*,mem32 [rvm: vex.nds.128.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,ND -VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.128.f3.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG +VCVTSI2SD xmmreg,xmmreg*,rm32 [rvm: vex.nds.128.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,SD +VCVTSI2SD xmmreg,xmmreg*,mem32 [rvm: vex.nds.128.f2.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD +VCVTSI2SD xmmreg,xmmreg*,rm64 [rvm: vex.nds.128.f2.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ +VCVTSI2SS xmmreg,xmmreg*,rm32 [rvm: vex.nds.128.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,SD +VCVTSI2SS xmmreg,xmmreg*,mem32 [rvm: vex.nds.128.f3.0f.w0 2a /r] AVX,SANDYBRIDGE,ND,SD +VCVTSI2SS xmmreg,xmmreg*,rm64 [rvm: vex.nds.128.f3.0f.w1 2a /r] AVX,SANDYBRIDGE,LONG,SQ VCVTSS2SD xmmreg,xmmreg*,xmmrm32 [rvm: vex.nds.128.f3.0f 5a /r] AVX,SANDYBRIDGE VCVTSS2SI reg32,xmmrm32 [rm: vex.128.f3.0f.w0 2d /r] AVX,SANDYBRIDGE VCVTSS2SI reg64,xmmrm32 [rm: vex.128.f3.0f.w1 2d /r] AVX,SANDYBRIDGE,LONG VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE -VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE +VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE,SO VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE -VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE +VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE,SY VCVTTPS2DQ xmmreg,xmmrm128 [rm: vex.128.f3.0f 5b /r] AVX,SANDYBRIDGE VCVTTPS2DQ ymmreg,ymmrm256 [rm: vex.256.f3.0f 5b /r] AVX,SANDYBRIDGE VCVTTSD2SI reg32,xmmrm64 [rm: vex.128.f2.0f.w0 2c /r] AVX,SANDYBRIDGE @@ -2249,8 +2249,8 @@ VLDMXCSR mem32 [m: vex.128.0f ae /2] AVX,SANDYBRIDGE VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r] AVX,SANDYBRIDGE VMASKMOVPS xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38 2c /r] AVX,SANDYBRIDGE VMASKMOVPS ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38 2c /r] AVX,SANDYBRIDGE -VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38 2e /r] AVX,SANDYBRIDGE -VMASKMOVPS mem256,xmmreg,xmmreg [mvr: vex.nds.256.66.0f38 2e /r] AVX,SANDYBRIDGE +VMASKMOVPS mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38 2e /r] AVX,SANDYBRIDGE,SO +VMASKMOVPS mem256,xmmreg,xmmreg [mvr: vex.nds.256.66.0f38 2e /r] AVX,SANDYBRIDGE,SY VMASKMOVPD xmmreg,xmmreg,mem128 [rvm: vex.nds.128.66.0f38 2d /r] AVX,SANDYBRIDGE VMASKMOVPD ymmreg,ymmreg,mem256 [rvm: vex.nds.256.66.0f38 2d /r] AVX,SANDYBRIDGE VMASKMOVPD mem128,xmmreg,xmmreg [mvr: vex.nds.128.66.0f38 2f /r] AVX,SANDYBRIDGE @@ -2275,12 +2275,12 @@ VMOVAPS xmmreg,xmmrm128 [rm: vex.128.0f 28 /r] AVX,SANDYBRIDGE VMOVAPS xmmrm128,xmmreg [mr: vex.128.0f 29 /r] AVX,SANDYBRIDGE VMOVAPS ymmreg,ymmrm256 [rm: vex.256.0f 28 /r] AVX,SANDYBRIDGE VMOVAPS ymmrm256,ymmreg [mr: vex.256.0f 29 /r] AVX,SANDYBRIDGE -VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r] AVX,SANDYBRIDGE -VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r] AVX,SANDYBRIDGE +VMOVQ xmmreg,xmmrm64 [rm: vex.128.f3.0f 7e /r] AVX,SANDYBRIDGE,SQ +VMOVQ xmmrm64,xmmreg [mr: vex.128.66.0f d6 /r] AVX,SANDYBRIDGE,SQ +VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r] AVX,SANDYBRIDGE,LONG,SQ +VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r] AVX,SANDYBRIDGE,LONG,SQ VMOVD xmmreg,rm32 [rm: vex.128.66.0f.w0 6e /r] AVX,SANDYBRIDGE -VMOVQ xmmreg,rm64 [rm: vex.128.66.0f.w1 6e /r] AVX,SANDYBRIDGE,LONG VMOVD rm32,xmmreg [mr: vex.128.66.0f.w0 7e /r] AVX,SANDYBRIDGE -VMOVQ rm64,xmmreg [mr: vex.128.66.0f.w1 7e /r] AVX,SANDYBRIDGE,LONG VMOVDDUP xmmreg,xmmrm64 [rm: vex.128.f2.0f 12 /r] AVX,SANDYBRIDGE VMOVDDUP ymmreg,ymmrm256 [rm: vex.256.f2.0f 12 /r] AVX,SANDYBRIDGE VMOVDQA xmmreg,xmmrm128 [rm: vex.128.66.0f 6f /r] AVX,SANDYBRIDGE |