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authorCyrill Gorcunov <gorcunov@gmail.com>2015-11-05 01:14:05 +0300
committerCyrill Gorcunov <gorcunov@gmail.com>2015-11-05 01:14:45 +0300
commita2a2d19f434380cd00fe31c9ea1734939eb2dadd (patch)
tree7fc4dd0cadbce7cd69adc90da3c4ec99a7722f1a
parent8aa9c2eb91b700a9dfdd587457d651f29499e816 (diff)
downloadnasm-a2a2d19f434380cd00fe31c9ea1734939eb2dadd.tar.gz
disasm: Fix disassembling of evex prefix
As been pointed by @hpa evex is pretty fine in ia-32. Quoting Peter | This is wrong, though; EVEX is permitted in 32-bit mode just as VEX is. | The key thing is that bits [7:5] have to be 1 in 32-bit mode. It is | unclear what happens if these bits are 110 as that depends on if it is | decoded using the modr/m decoder or not. For VEX prefixes we accept | them as VEX in that case, which may not match the CPU. This is a fix for commit db6ecf9b76a2 Reported-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
-rw-r--r--disasm.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/disasm.c b/disasm.c
index da396326..51c65787 100644
--- a/disasm.c
+++ b/disasm.c
@@ -1215,9 +1215,9 @@ int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
case 0x62:
{
- uint8_t evex_p0 = data[1] & 0x0f;
- if (segsize == 64 &&
- ((evex_p0 >= 0x01) && (evex_p0 <= 0x03))) {
+ if (segsize == 64 || ((data[1] & 0xc0) == 0xc0)) {
+ uint8_t evex_p0 = data[1] & 0x0f;
+
data++; /* 62h EVEX prefix */
prefix.evex[0] = *data++;
prefix.evex[1] = *data++;