Reshuffle and move the bytecodes for segment register push/pop

Reshuffle the bytecodes for segment register push/pop to make more
sense, and move them from \4 to \344, thus freeing up the single-digit
bytecodes \4..\7 for future use.  It doesn't really make sense to use
single-digit bytecodes for this very oddball use.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

4 files changed, 126 insertions, 124 deletions

diff --git a/assemble.c b/assemble.c
index f8b782cc..37efd622 100644
--- a/assemble.c
+++ b/assemble.c
@@ -8,10 +8,6 @@
  * the actual codes (C syntax, i.e. octal):
  * \0            - terminates the code. (Unless it's a literal of course.)
  * \1, \2, \3    - that many literal bytes follow in the code stream
- * \4, \6        - the POP/PUSH (respectively) codes for CS, DS, ES, SS
- *                 (POP is never used for CS) depending on operand 0
- * \5, \7        - the second byte of POP/PUSH codes for FS, GS, depending
- *                 on operand 0
  * \10..\13      - a literal byte follows in the code stream, to be added
  *                 to the register value of operand 0..3
  * \14..\17      - a signed byte immediate operand, from operand 0..3
@@ -101,6 +97,10 @@
  *                 \336-\337 are still listed as prefixes in the disassembler.
  * \340          - reserve <operand 0> bytes of uninitialized storage.
  *                 Operand 0 had better be a segmentless constant.
+ * \344,\345     - the PUSH/POP (respectively) codes for CS, DS, ES, SS
+ *                 (POP is never used for CS) depending on operand 0
+ * \346,\347     - the second byte of PUSH/POP codes for FS, GS, depending
+ *                 on operand 0
  * \360		 - no SSE prefix (== \364\331)
  * \361          - 66 SSE prefix (== \366\331)
  * \362          - F2 SSE prefix (== \364\332)
@@ -800,12 +800,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
         case 03:
             codes += c, length += c;
             break;
-        case 04:
-        case 05:
-        case 06:
-        case 07:
-            length++;
-            break;
         case 010:
         case 011:
         case 012:
@@ -1049,6 +1043,12 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
             else
                 length += ins->oprs[0].offset;
             break;
+        case 0344:
+        case 0345:
+        case 0346:
+        case 0347:
+            length++;
+            break;
 	case 0360:
 	    break;
 	case 0361:
@@ -1202,46 +1202,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
             offset += c;
             break;
 
-        case 04:
-        case 06:
-            switch (ins->oprs[0].basereg) {
-            case R_CS:
-                bytes[0] = 0x0E + (c == 0x04 ? 1 : 0);
-                break;
-            case R_DS:
-                bytes[0] = 0x1E + (c == 0x04 ? 1 : 0);
-                break;
-            case R_ES:
-                bytes[0] = 0x06 + (c == 0x04 ? 1 : 0);
-                break;
-            case R_SS:
-                bytes[0] = 0x16 + (c == 0x04 ? 1 : 0);
-                break;
-            default:
-                errfunc(ERR_PANIC,
-                        "bizarre 8086 segment register received");
-            }
-            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
-            offset++;
-            break;
-
-        case 05:
-        case 07:
-            switch (ins->oprs[0].basereg) {
-            case R_FS:
-                bytes[0] = 0xA0 + (c == 0x05 ? 1 : 0);
-                break;
-            case R_GS:
-                bytes[0] = 0xA8 + (c == 0x05 ? 1 : 0);
-                break;
-            default:
-                errfunc(ERR_PANIC,
-                        "bizarre 386 segment register received");
-            }
-            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
-            offset++;
-            break;
-
         case 010:
         case 011:
         case 012:
@@ -1781,6 +1741,48 @@ static void gencode(int32_t segment, int64_t offset, int bits,
             }
             break;
 
+        case 0344:
+        case 0345:
+	    bytes[0] = c & 1;
+            switch (ins->oprs[0].basereg) {
+            case R_CS:
+                bytes[0] += 0x0E;
+                break;
+            case R_DS:
+                bytes[0] += 0x1E;
+                break;
+            case R_ES:
+                bytes[0] += 0x06;
+                break;
+            case R_SS:
+                bytes[0] += 0x16;
+                break;
+            default:
+                errfunc(ERR_PANIC,
+                        "bizarre 8086 segment register received");
+            }
+            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
+            offset++;
+            break;
+
+        case 0346:
+        case 0347:
+	    bytes[0] = c & 1;
+            switch (ins->oprs[0].basereg) {
+            case R_FS:
+                bytes[0] += 0xA0;
+                break;
+            case R_GS:
+                bytes[0] += 0xA8;
+                break;
+            default:
+                errfunc(ERR_PANIC,
+                        "bizarre 386 segment register received");
+            }
+            out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
+            offset++;
+            break;
+
 	case 0360:
 	    break;
 
diff --git a/disasm.c b/disasm.c
index 0ff40fc1..e3b02245 100644
--- a/disasm.c
+++ b/disasm.c
@@ -407,67 +407,6 @@ static int matches(const struct itemplate *t, uint8_t *data,
                     return false;
 	    break;
 
-	case 04:
-            switch (*data++) {
-            case 0x07:
-                ins->oprs[0].basereg = 0;
-                break;
-            case 0x17:
-                ins->oprs[0].basereg = 2;
-                break;
-            case 0x1F:
-                ins->oprs[0].basereg = 3;
-                break;
-            default:
-                return false;
-            }
-	    break;
-
-	case 05:
-            switch (*data++) {
-            case 0xA1:
-                ins->oprs[0].basereg = 4;
-                break;
-            case 0xA9:
-                ins->oprs[0].basereg = 5;
-                break;
-            default:
-                return false;
-	    }
-	    break;
-
-	case 06:
-            switch (*data++) {
-            case 0x06:
-                ins->oprs[0].basereg = 0;
-                break;
-            case 0x0E:
-                ins->oprs[0].basereg = 1;
-                break;
-            case 0x16:
-                ins->oprs[0].basereg = 2;
-                break;
-            case 0x1E:
-                ins->oprs[0].basereg = 3;
-                break;
-            default:
-                return false;
-            }
-	    break;
-
-	case 07:
-            switch (*data++) {
-            case 0xA0:
-                ins->oprs[0].basereg = 4;
-                break;
-            case 0xA8:
-                ins->oprs[0].basereg = 5;
-                break;
-            default:
-                return false;
-            }
-	    break;
-
 	case4(010):
 	{
             int t = *r++, d = *data++;
@@ -891,6 +830,67 @@ static int matches(const struct itemplate *t, uint8_t *data,
 	case 0340:
 	    return false;
 
+	case 0344:
+            switch (*data++) {
+            case 0x06:
+                ins->oprs[0].basereg = 0;
+                break;
+            case 0x0E:
+                ins->oprs[0].basereg = 1;
+                break;
+            case 0x16:
+                ins->oprs[0].basereg = 2;
+                break;
+            case 0x1E:
+                ins->oprs[0].basereg = 3;
+                break;
+            default:
+                return false;
+            }
+	    break;
+
+	case 0345:
+            switch (*data++) {
+            case 0x07:
+                ins->oprs[0].basereg = 0;
+                break;
+            case 0x17:
+                ins->oprs[0].basereg = 2;
+                break;
+            case 0x1F:
+                ins->oprs[0].basereg = 3;
+                break;
+            default:
+                return false;
+            }
+	    break;
+
+	case 0346:
+            switch (*data++) {
+            case 0xA0:
+                ins->oprs[0].basereg = 4;
+                break;
+            case 0xA8:
+                ins->oprs[0].basereg = 5;
+                break;
+            default:
+                return false;
+            }
+	    break;
+
+	case 0347:
+            switch (*data++) {
+            case 0xA1:
+                ins->oprs[0].basereg = 4;
+                break;
+            case 0xA9:
+                ins->oprs[0].basereg = 5;
+                break;
+            default:
+                return false;
+	    }
+	    break;
+
 	case 0360:
 	    if (prefix->osp || prefix->rep)
 		return false;
diff --git a/insns.dat b/insns.dat
index 2aebe54f..351a9a9d 100644
--- a/insns.dat
+++ b/insns.dat
@@ -923,8 +923,8 @@ POP		rm16				\320\1\x8F\200					8086
 POP		rm32				\321\1\x8F\200					386,NOLONG
 POP		rm64				\323\1\x8F\200					X64
 POP		reg_cs				\1\x0F						8086,UNDOC,ND
-POP		reg_dess			\4						8086,NOLONG
-POP		reg_fsgs			\1\x0F\5					386
+POP		reg_dess			\345						8086,NOLONG
+POP		reg_fsgs			\1\x0F\347					386
 POPA		void				\322\1\x61					186,NOLONG
 POPAD		void				\321\1\x61					386,NOLONG
 POPAW		void				\320\1\x61					186,NOLONG
@@ -971,9 +971,9 @@ PUSH		reg64				\323\10\x50					X64
 PUSH		rm16				\320\1\xFF\206					8086
 PUSH		rm32				\321\1\xFF\206					386,NOLONG
 PUSH		rm64				\323\1\xFF\206					X64
-PUSH		reg_cs				\6						8086,NOLONG
-PUSH		reg_dess			\6						8086,NOLONG
-PUSH		reg_fsgs			\1\x0F\7					386
+PUSH		reg_cs				\344						8086,NOLONG
+PUSH		reg_dess			\344						8086,NOLONG
+PUSH		reg_fsgs			\1\x0F\346					386
 PUSH		imm8				\1\x6A\274					186
 PUSH		imm16				\320\144\x68\140				186,AR0,SZ
 PUSH		imm32				\321\154\x68\150				386,NOLONG,AR0,SZ
diff --git a/insns.pl b/insns.pl
index 66309f07..b74017b2 100755
--- a/insns.pl
+++ b/insns.pl
@@ -504,14 +504,6 @@ sub startseq($) {
 	  }
 
 	  unshift(@codes, $c0);
-      } elsif ($c0 == 04) {
-	  return addprefix($prefix, 0x07, 0x17, 0x1F);
-      } elsif ($c0 == 05) {
-	  return addprefix($prefix, 0xA1, 0xA9);
-      } elsif ($c0 == 06) {
-	  return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
-      } elsif ($c0 == 07) {
-	  return addprefix($prefix, 0xA0, 0xA8);
       } elsif ($c0 >= 010 && $c0 <= 013) {
 	  return addprefix($prefix, $c1..($c1+7));
       } elsif (($c0 & ~013) == 0144) {
@@ -520,6 +512,14 @@ sub startseq($) {
 	  return addprefix($prefix, $c1..($c1+15));
       } elsif ($c0 == 0 || $c0 == 0340) {
 	  return $prefix;
+      } elsif ($c0 == 0344) {
+	  return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
+      } elsif ($c0 == 0345) {
+	  return addprefix($prefix, 0x07, 0x17, 0x1F);
+      } elsif ($c0 == 0346) {
+	  return addprefix($prefix, 0xA0, 0xA8);
+      } elsif ($c0 == 0347) {
+	  return addprefix($prefix, 0xA1, 0xA9);
       } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
 	  my $m,$wlp,$vxp;
 	  $m   = shift(@codes);