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author | H. Peter Anvin <hpa@zytor.com> | 2008-05-26 22:48:51 -0700 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2008-05-26 22:48:51 -0700 |
commit | 62449a6ce08e4aff1ffa8b77ddb759ebe5d8567c (patch) | |
tree | e39b02c85a5d718621ceb3a41a52563118373e7e | |
parent | 4a49b6770fc7889dcc6c1689e96748f602f8ad95 (diff) | |
download | nasm-62449a6ce08e4aff1ffa8b77ddb759ebe5d8567c.tar.gz |
VCVTPD2PS, VCVTPD2DQ, VCVTTPD2DQ mem need explicit op size (BR 1974170)
BR 1974170: VCVTPD2PS, VCVTPD2DQ, VCVTTPD2DQ with a memory operand are
ambiguous without a specific operand size, so force one to be added.
Split the instruction pattern due to our current clunky handling of
MMX/XMM/YMM registers together with sizes. Fix in the future, please!
-rw-r--r-- | insns.dat | 18 | ||||
-rw-r--r-- | test/avx.asm | 19 |
2 files changed, 31 insertions, 6 deletions
@@ -2651,10 +2651,14 @@ VCVTDQ2PD xmmreg,xmmrm [rm: vex.128.f3.0f e6 /r] AVX,SANDYBRIDGE,SQ VCVTDQ2PD ymmreg,xmmrm [rm: vex.256.f3.0f e6 /r] AVX,SANDYBRIDGE,SO VCVTDQ2PS xmmreg,xmmrm [rm: vex.128.0f 5b /r] AVX,SANDYBRIDGE,SO VCVTDQ2PS ymmreg,ymmrm [rm: vex.256.0f 5b /r] AVX,SANDYBRIDGE,SY -VCVTPD2DQ xmmreg,xmmrm [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE,SO -VCVTPD2DQ xmmreg,ymmrm [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE,SY -VCVTPD2PS xmmreg,xmmrm [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE,SO -VCVTPD2PS xmmreg,ymmrm [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE,SY +VCVTPD2DQ xmmreg,xmmreg [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2DQ xmmreg,mem128 [rm: vex.128.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2DQ xmmreg,ymmreg [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2DQ xmmreg,mem256 [rm: vex.256.f2.0f e6 /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,xmmreg [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,mem128 [rm: vex.128.66.0f 5a /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,ymmreg [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE +VCVTPD2PS xmmreg,mem256 [rm: vex.256.66.0f 5a /r] AVX,SANDYBRIDGE VCVTPS2DQ xmmreg,xmmrm [rm: vex.128.66.0f 5b /r] AVX,SANDYBRIDGE,SO VCVTPS2DQ ymmreg,ymmrm [rm: vex.256.66.0f 5b /r] AVX,SANDYBRIDGE,SY VCVTPS2PD xmmreg,xmmrm [rm: vex.128.0f 5a /r] AVX,SANDYBRIDGE,SQ @@ -2679,8 +2683,10 @@ VCVTSS2SD xmmreg,xmmreg,xmmrm [rvm: vex.nds.128.f3.0f 5a /r] AVX,SANDYBRIDGE,S VCVTSS2SD xmmreg,xmmrm [r+vm: vex.nds.128.f3.0f 5a /r] AVX,SANDYBRIDGE,SD VCVTSS2SI reg32,xmmrm [rm: vex.128.f3.0f.w0 2d /r] AVX,SANDYBRIDGE,SD VCVTSS2SI reg64,xmmrm [rm: vex.128.f3.0f.w1 2d /r] AVX,SANDYBRIDGE,SD,LONG -VCVTTPD2DQ xmmreg,xmmrm [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE,SO -VCVTTPD2DQ xmmreg,ymmrm [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE,SY +VCVTTPD2DQ xmmreg,xmmreg [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE +VCVTTPD2DQ xmmreg,mem128 [rm: vex.128.66.0f e6 /r] AVX,SANDYBRIDGE +VCVTTPD2DQ xmmreg,ymmreg [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE +VCVTTPD2DQ xmmreg,mem256 [rm: vex.256.66.0f e6 /r] AVX,SANDYBRIDGE VCVTTPS2DQ xmmreg,xmmrm [rm: vex.128.f3.0f 5b /r] AVX,SANDYBRIDGE,SO VCVTTPS2DQ ymmreg,ymmrm [rm: vex.256.f3.0f 5b /r] AVX,SANDYBRIDGE,SY VCVTTSD2SI reg32,xmmrm [rm: vex.128.f2.0f.w0 2c /r] AVX,SANDYBRIDGE,SQ diff --git a/test/avx.asm b/test/avx.asm index d58b3eae..14cf9400 100644 --- a/test/avx.asm +++ b/test/avx.asm @@ -30,3 +30,22 @@ vpextrw eax,xmm1,0x33 vpextrd eax,xmm1,0x33 ; vpextrq eax,xmm1,0x33 + + vcvtpd2ps xmm0,xmm1 + vcvtpd2ps xmm0,oword [rsi] + vcvtpd2ps xmm0,ymm1 + vcvtpd2ps xmm0,yword [rsi] +; vcvtpd2ps xmm0,[rsi] + + vcvtpd2dq xmm0,xmm1 + vcvtpd2dq xmm0,oword [rsi] + vcvtpd2dq xmm0,ymm1 + vcvtpd2dq xmm0,yword [rsi] +; vcvtpd2dq xmm0,[rsi] + + vcvttpd2dq xmm0,xmm1 + vcvttpd2dq xmm0,oword [rsi] + vcvttpd2dq xmm0,ymm1 + vcvttpd2dq xmm0,yword [rsi] +; vcvttpd2dq xmm0,[rsi] +
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