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path: root/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
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-rw-r--r--llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
index f86b65a01523..1a040a7e2523 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
@@ -118,6 +118,9 @@ enum OperandType : unsigned {
OPERAND_UIMM20,
OPERAND_UIMMLOG2XLEN,
OPERAND_LAST_RISCV_IMM = OPERAND_UIMMLOG2XLEN,
+ // Operand is either a register or uimm5, this is used by V extension pseudo
+ // instructions to represent a value that be passed as AVL to either vsetvli
+ // or vsetivli.
OPERAND_AVL,
};
} // namespace RISCVOp