diff options
author | Bill Wendling <isanbard@gmail.com> | 2010-09-10 10:21:50 +0000 |
---|---|---|
committer | Bill Wendling <isanbard@gmail.com> | 2010-09-10 10:21:50 +0000 |
commit | fc8a7d88acb94f7deb96c8daaec7edef53795ff0 (patch) | |
tree | 2108bd85e21398ee066623b0f3e439124996f971 | |
parent | b30b6bd8c779dc02f953ae7698d5c05296da2484 (diff) | |
download | llvm-fc8a7d88acb94f7deb96c8daaec7edef53795ff0.tar.gz |
Approved by Evan.
$ svn merge -c 113576 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r113576 into '.':
U test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
U lib/Target/ARM/ARMLoadStoreOptimizer.cpp
llvm-svn: 113583
-rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 3 | ||||
-rw-r--r-- | llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll | 6 |
2 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index d1acacfb1d0e..2b7645a42119 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -458,9 +458,10 @@ static inline unsigned getLSMultipleTransferSize(MachineInstr *MI) { case ARM::t2STM: case ARM::VLDMS: case ARM::VSTMS: + return (MI->getNumOperands() - 4) * 4; case ARM::VLDMD: case ARM::VSTMD: - return (MI->getNumOperands() - 4) * 4; + return (MI->getNumOperands() - 4) * 8; } } diff --git a/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll b/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll index 81483cb4e7c5..ee63656b26d3 100644 --- a/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll +++ b/llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll @@ -1,11 +1,15 @@ -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 +; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | FileCheck %s @quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] @dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1] @A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1] +; CHECK: dct_luma_sp: define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) { entry: +; Make sure to use base-updating stores for saving callee-saved registers. +; CHECK-NOT: sub sp +; CHECK: vstmdb sp! %predicted_block = alloca [4 x [4 x i32]], align 4 ; <[4 x [4 x i32]]*> [#uses=1] br label %cond_next489 |