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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-08 14:27:55 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-08 14:27:55 +0000 |
| commit | 469d86efcf45859173387499dd308714a3a68a4d (patch) | |
| tree | 4555415354edae5481541604b5b75aebdc181382 | |
| parent | 9b7f7cd3439ac20ebc028a7044aa3e559d7af3ea (diff) | |
| download | llvm-469d86efcf45859173387499dd308714a3a68a4d.tar.gz | |
Merging r197572:
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r197572 | rafael.espindola | 2013-12-18 09:35:37 -0500 (Wed, 18 Dec 2013) | 6 lines
One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.
Thanks for Iain Sandoe for testing this with the original gcc.
Clang was already getting this right.
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llvm-svn: 205766
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/anon_aggr.ll | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index 1d228b613ba5..44abfbcf6a7c 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -48,7 +48,8 @@ static std::string getDataLayoutString(const PPCSubtarget &ST) { // Note, the alignment values for f64 and i64 on ppc64 in Darwin // documentation are wrong; these are correct (i.e. "what gcc does"). - Ret += "-f64:64:64-i64:64:64"; + if (ST.isPPC64() || ST.isSVR4ABI()) + Ret += "-f64:64:64-i64:64:64"; // Set support for 128 floats depending on the ABI. if (ST.isPPC64() && ST.isSVR4ABI()) { diff --git a/llvm/test/CodeGen/PowerPC/anon_aggr.ll b/llvm/test/CodeGen/PowerPC/anon_aggr.ll index 1525e05501ee..ce07d8845ddb 100644 --- a/llvm/test/CodeGen/PowerPC/anon_aggr.ll +++ b/llvm/test/CodeGen/PowerPC/anon_aggr.ll @@ -119,9 +119,9 @@ unequal: ; CHECK: ld 3, -[[OFFSET1]](1) ; DARWIN32: _func3: -; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 40 +; DARWIN32: addi r[[REG1:[0-9]+]], r[[REGSP:[0-9]+]], 36 ; DARWIN32: addi r[[REG2:[0-9]+]], r[[REGSP]], 24 -; DARWIN32: lwz r[[REG3:[0-9]+]], 48(r[[REGSP]]) +; DARWIN32: lwz r[[REG3:[0-9]+]], 44(r[[REGSP]]) ; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]]) ; DARWIN32: cmplw cr{{[0-9]+}}, r[[REG4]], r[[REG3]] ; DARWIN32: stw r[[REG3]], -[[OFFSET1:[0-9]+]] |