| Commit message (Collapse) | Author | Age | Files | Lines |
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(cherry picked from commit 81a8ff3743ae3dd21b5a0225f1ecf6bc798cbad4)
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This commit breaks Bluetooth UART connection on the WandBoard.
This reverts commit e21b0b06f4b99a22f9cf5d63641c00a6d83d433a.
(cherry picked from commit 7cdaeabf2df37efc5bc7d84319c58af8df6345a6)
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In case of inband interrupts, if we handle the interrupt in dpc thread,
two level of thread switching takes place to process wifi interrupts.
One in SDHCI driver and the other in Wifi driver. This may cause the system
instability.
Because the SDHCI calls sdio_irq_thread() to handle the irq, this thread locks
mmc host and calls wifi handler. It expects WiFi handler to be quick and
enables sdio interrupt from card at end. If wifi handler defers this work for
a different thread, sdio_irq_thread() will be stuck on next wifi interrupt
since mmc lock is not freed.
Handling the interrupt in ISR directly will prevent thread context switching in
wifi driver. It can fix the instability problems.
Signed-off-by: Wei Ni <wni@nvidia.com>
(cherry picked from commit c782ec69711573ee082fa78b80dae3897269266e)
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In the event that a I2C bus is disturbed, for instance by a slave missing
a clock pulse, it is desirable to have a way to get the bus back working
other than by power-cycling the whole system. This patch makes it possible to
to have a special function in board support code issue an I2C reset, since
the IMX peripheral is not capable of doing this, and it needs to be done
by bit-banging the corresponding pins in GPIO mode.
The reset function needs to check if the bus is hung by checking the state
of SDA and issue a reset by pulsing SCL a few times as long as SDA is low.
Signed-off-by: David Jander <david@xxxxxxxxxxx>
Conflicts:
drivers/i2c/busses/i2c-imx.c
(cherry picked from commit c1c409c8e9f96e1bd16717733c7456497b42d558)
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With the current default configuration, this commit is no longer needed.
Avoid patching specialized driver files such as the GPU.
This reverts commit c0fceed3315ed3167cd024a6b5a27b7c711a0d22.
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Adds MIPI-CSI support for Wandboard
Upstream-Status: Inappropriate
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(cherry picked from commit 076ad8b1528a6439e9bb629951d8fea6878d1dfc)
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(cherry picked from commit 48df1ff3c9969b00f097b8030ce4c16d5aaeeb66)
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(cherry picked from commit 70a61be9a499b24484b4da3e1ea7f69f3c0c72dd)
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The previous behavior of the driver did not work properly with Qt5
QtQuick multi touch-point gestures, due to how touch-points are
reported when removing a touch-point. My interpretation of the
available documentation [1] was that the driver should report all
touch-points between SYN_REPORTs, but it is not explicitly stated so.
I've found another mail-thread [2] where the creator of the protocol
states:
"The protocol defines a generic way of sending a variable amount of
contacts. The contact count is obtained by counting the number of
non-empty finger packets between SYN_REPORT events."-Henrik Rydberg
I think this verifies my assumption that all touch-points should be
reported between SYN_REPORTs, otherwise it can not be used to obtain
the count.
[1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt
[2] http://lists.x.org/archives/xorg-devel/2010-March/006466.html
Signed-off-by: Erik Boto <erik.boto@pelagicore.com>
Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
(cherry picked from commit 7cba001c5a502680f6dbf902821726779a9c9287)
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add ecb(aes) support for caam algorithm, the caam H/W
support both ecb and cbc, add the algorithm into template.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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This patch fix the CAAM support for Crypto User Space API support.
in the dma_map_sg_chained() function, the chained mode will loop
until the scatter list end, but when the scatter list end, it will
return null and orignal code will set this to the sg list point
used by dma_sync, so it will panic.
When do chain dma, use a tmp do going through the list.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
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sdma: bd is bufferable dma buffer, interrupt handler can not get correct
data after sdma script updated. Which will cause there is no interrupt
after failed period number times in the interrupt handler.
This is a workaround.
Signed-off-by: b02247 <b02247@freescale.com>
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Revert"ENGR00254931 IPUv3 Fb: Fix display twinkling issue during suspend/resume"
This reverts commit 4bd475ba0603e10cdcab7e55f89599f7016cad25.
That patch will lead to kernel crash when doing video playback on video16 with
overlay on. The reason is that fb driver doesn't reallocate larger DMA buffer
requested by V4L2 driver, while IPU hardware write to large DMA address.
Other solution is needed for the original issue.
kernel BUG at arch/arm/mm/dma-mapping.c:478!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 80004000
[00000000] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP
Modules linked in: mxc_v4l2_capture ipu_csi_enc ipu_prp_enc ipu_fg_overlay_sdc
ipu_bg_overlay_sdc ipu_still ov5640_camera_mipi ov5640_camera
CPU: 0 Not tainted (3.0.35-2506-g556681e #1)
PC is at __bug+0x1c/0x28
LR is at __bug+0x18/0x28
pc : [<800442ac>] lr : [<800442a8>] psr: 20000113
sp : 80a8fe88 ip : c09b2000 fp : 80aa3a70
r10: 80a90080 r9 : 00000040 r8 : bffecec4
r7 : 00000001 r6 : 00000002 r5 : 00000800 r4 : ce5c5e65
r3 : 00000000 r2 : 00000104 r1 : 0bfcf000 r0 : 00000033
Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c53c7d Table: 4a97404a DAC: 00000015
Process swapper (pid: 0, stack limit = 0x80a8e2f0)
Stack: (0x80a8fe88 to 0x80a90000)
fe80: 80afde30 8004a464 00000880 ffdfd6b0 bffec000 802fa678
fea0: bffec000 00000060 5e5c5e65 ce5c5e65 bffec250 80ad4c88 bffece4c 00000001
fec0: bffecec4 00000040 0000012c 8c009480 8c009488 80a90080 ffff9527 80423f58
fee0: 00000001 80a8e000 00000096 00000001 80a9004c 80a8e000 00000103 80af77e0
ff00: 00000000 80a90040 00000003 8007a034 00000096 00000000 80a8e000 0000000a
ff20: 80a94c4c 80a8e000 80039c00 80a8e000 00000096 00000000 80a8e000 00000000
ff40: 00000000 8007a570 80aa3cc0 80041874 ffffffff f2a00100 00000096 00000002
ff60: 00000001 80040a0c 80af9140 80000093 00000001 00000000 80a8e000 80af1ce4
ff80: 80511044 80aa6e7c 1000406a 412fc09a 00000000 00000000 00000000 80a8ffb0
ffa0: 8004f648 80041b04 40000013 ffffffff 80041ae0 80041d08 00000001 80aa3b3c
ffc0: 80af1c40 8002f538 8c005160 80008868 800082f8 00000000 00000000 8002f538
ffe0: 00000000 10c53c7d 80aa3a6c 8002f534 80aa6e74 10008040 00000000 00000000
[<800442ac>] (__bug+0x1c/0x28) from [<8004a464>]
(___dma_single_dev_to_cpu+0x84/0x94)
[<8004a464>] (___dma_single_dev_to_cpu+0x84/0x94) from [<802fa678>]
(fec_rx_poll+0x228/0x2c8)
[<802fa678>] (fec_rx_poll+0x228/0x2c8) from [<80423f58>]
(net_rx_action+0xb0/0x17c)
[<80423f58>] (net_rx_action+0xb0/0x17c) from [<8007a034>]
(__do_softirq+0xac/0x140)
[<8007a034>] (__do_softirq+0xac/0x140) from [<8007a570>] (irq_exit+0x94/0x9c)
[<8007a570>] (irq_exit+0x94/0x9c) from [<80041874>] (handle_IRQ+0x50/0xac)
[<80041874>] (handle_IRQ+0x50/0xac) from [<80040a0c>] (__irq_svc+0x4c/0xe8)
[<80040a0c>] (__irq_svc+0x4c/0xe8) from [<80041b04>] (default_idle+0x24/0x28)
[<80041d08>] (cpu_idle+0xc8/0x108) from [<80008868>] (start_kernel+0x248/0x288)
[<80008868>] (start_kernel+0x248/0x288) from [<10008040>] (0x10008040)
Signed-off-by: Wayne Zou <b36644@freescale.com>
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In testing async mode on mx6q ard and mx6dl ard, driver always said "can
not alloc rx buffer".
Change async's ring buffer size from 2048 to 1536(MEP package size) and
reduce the extra ring buffer for drop package, now the iram usage amount
in async mode reduced from 34816 to 24576.
Signed-off-by: Terry Lv <r65388@freescale.com>
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This is an issue from IC errata ERR005641 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Currently the flexcan driver uses hardware local echo. This blindly
echos all transmitted frames to all receiving sockets, regardless what
CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACK are set to.
This patch now submits transmitted frames to be echoed in the transmit
complete interrupt, preserving the reference to the sending
socket. This allows the can protocol to correctly handle the local
echo.
Further this patch moves tx_bytes statistic accounting into the tx_complete
handler.
Signed-off-by: Reuben Dowle <reuben.dowle@navico.com>
[mkl: move tx_bytes accounting into tx_complete handler; cleanups]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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can_get_echo_skb() is usually called in the TX complete handler.
The stats->tx_packets and stats->tx_bytes should be updated there, too.
This patch simplifies to figure out the size of the sent CAN frame.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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The NOR may suffers a write-buffer timeout during the bonnie++/ubifs stress
test. This patch is just a workaround to fix this issue.
With this patch, the read/write/erase will do in the synchronous way.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Use circle buf to replace old ringbuf mechanism.
Change to use circle buffer in read, write, rx isr and tx isr functions.
In first design of MLB, it's using it's own mechanism to manage ring
buffer, like in mxc_mlb.c.
And then, I saw that kernel already had a serials of circ buffer macros
which can be used to manage ring buffers.
This patch is to use circle buffer macros to manage mlb internal ring
buffers.
For detail of circle buffers, you can refer to
linux-2.6-imx/Documentation/circular-buffers.txt.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Group static variables to structure mlb_data.
Use mlb_data as platform data to be passed to file operation
functions.
Change accordingly functions for this change.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Reset whole CDR in init function. This will make mlb connection to MITB
more stable.
This is a missed part in mx6 rm's mlb section, but new in mlb's latest
spec DS62420AP2.pdf 12.1.1-1.
Without this patch, mlb may receive irq from MITB during initialization.
It might cause some connection issue that mlb can't receive data
sometimes. It was treat to be MITB's fault before we get the latest
spec.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Changes are:
1. Use print_hex_dump to print buffer in DEBUG mode.
2. Add more debug msgs.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Remove MLB150_ from macro define names to make code clean.
Signed-off-by: Terry Lv <r65388@freescale.com>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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When working on a problem with some flash chips that lock up during
write-buffer operations, I think there may be a bug in the linux
handling of chips using cfi_cmdset_0002.c.
The datasheets I have found for a number of these chips all specify that
when aborting a write-buffer command, it is not enough to use the
standard reset. Rather a "write-to-buffer-reset command" is needed.
This command is quite similar for all chips, the main variance seem to
be if the final 0xF0 can go to any address or must go to addr_unlock1.
The bug is then in the recovery handling when timing out at the end of
do_write_buffer, where using the normal reset command is not sufficient.
Without this change, if the write-buffer command fails then any
following operations on the flash also fail.
Signed-off-by: Harald Nordgard-Hansen <hhansen@pvv.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Fix the following issues with Micron's (formerly Numonyx)
M29EW NOR flash chips, as documented on TN-13-07:
- Correcting Erase Suspend Hang Ups (page 20)
- Resolving the Delay After Resume Issue (page 22)
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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These should be semicolons, not commas.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Spansion S29NS512P flash uses a 16bit transfer to report number
of sectors instead of two 8bit accesses as CFI specifies.
Artem: remove warning message which said that we are applying the
fixup - no need to scary the user unnecessarily.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This patch is part of a set which fixes unnecessary flash erase and write errors
resulting from the MTD CFI driver turning off vpp while an erase is in progress.
This patch ensures that only those flash operations which call ENABLE_VPP() can
then call DISABLE_VPP(). Other operations should never call DISABLE_VPP().
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This allows the mtdoops driver to work on flash chips using the
AMD/Fujitsu compatible command set.
As the code comments note, the locks used throughout the normal code
paths in the driver are ignored, so that the chance of writing out the
kernel's last messages are maximized.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Start moving away from the MTD_DEBUG_LEVEL messages. The dynamic
debugging feature is a generic kernel feature that provides more
flexibility.
(See Documentation/dynamic-debug-howto.txt)
Also fix some punctuation, indentation, and capitalization that went
along with the affected lines.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit 573bab0be2427d6664420eaf9d8e272dbe9d840f.
i.mx6dl/dq sabreauto/sabresd board will boot up failed
randomly with this patch-set, thus revert it. [Jason]
Signed-off-by: Jason Liu <r64343@freescale.com>
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We don't need invent the wheel to implement the wrap for the _do_div,
we can use the kernel common helper function for the u64 divide with
div_u64() function call
This also fix the build break when CONFIG_DEBUG_SECTION_MISMATCH=y with
GCC4.6.3 cross-compile toolchain.
CC init/version.o
LD init/built-in.o
LD .tmp_vmlinux1
drivers/built-in.o: In function `_do_div.part.1':
clkdev.c:(.text+0x15c23c): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c25c): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c2bc): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c3ac): undefined reference to `__aeabi_uldivmod'
clkdev.c:(.text+0x15c3d0): undefined reference to `__aeabi_uldivmod'
This issue is caused by the wrongly optimized code produced by GCC,
See the bug report here: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48783
The similar build break issue report at:
http://lists.infradead.org/pipermail/linux-mtd/2012-May/041677.html
Signed-off-by: Jason Liu <r64343@freescale.com>
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For both CSI_MEMx and CSI_PRP_VF(ENC)_MEM capture channels,
we disable them with the following sequence:
1) Wait for an idmac channel eof interrupt.
2) Disable CSI by clearing CSIx_EN in IPU_CONF register.
3) Disable idmac channel by clearing relevant bit in
IPU_IDMAC_CH_EN_1 register and other settings.
However, currently, we don't do 3) until CSI_PRP_VF(ENC)_MEM's
idmac channel being not busy by a while loop check. In case, an
external sensor is plugged out from the system or the sensor is
somehow broken, we will be unable to get out of that infinite
while loop. Since this check is unnecessary(we've already
waited for an idmac eof interrupt), this patch simply removes
it from the disable routine of CSI_PRP_VF(ENC)_MEM channel.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 8136a50bd049d68f92604397f256e6067ef2b572)
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There is annoying ipu warning when doing preview
by using v4l2 fg overlay component:
/unit_tests/mxc_v4l2_overlay.out -iw 320 -ih 240 -ow 1280
-oh 720 -r 0 -fg -t 5
imx-ipuv3 imx-ipuv3.0: IDMAC12's EBA0 is not 8-byte aligned
This warning can be seen only when preview size is bigger
than 1024*1024(ipu device driver split mode is enabled).
After debug, it appears that the unaligned buffer address
is caused by input cropping for left strip, and this
cropping is triggered by the split mode algrithm. The
algrithm is complex, so currently this patch only changes
the input pixel format of the ipu task from UYVY to NV12
to workaround this warning.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit aaf14db7afe5ce603857782e96033b259606594b)
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According to the OV FAE, the image quality(iq) setting is
from 0x5000 register to 0x3a1f register in the camera's
initialization setting. This patch aligns image quality
setting of ov5640 dvp camera to ov5640 mipi camera.
The registers whose values are changed are 0x5001, 0x5189,
0x518b, 0x518d, 0x518e, 0x518f, 0x5199, 0x519c and 0x519d.
This change may improve the image quality of 5M/1M/VGA/QVGA
taken pictures in Android according to test team observation.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit c4f92bf59c7e3b397f42e3eb28dfbd93278c8441)
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Add support for single-touch for the Egalax Touch driver
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
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Print out the @adr when the write timeout occurs.
This is useful to check if the write timeouts occur at the
same address.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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This reverts commit 4020b38fe2f0283af7630dbed28ed32d64118a83.
After apply these two patches, we can not pass the stress test.
So revert these two patches.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
This patch provides support for routing the ENET interrupt
to GPIO_1_6. Routing to this GPIO requires no HW board mods.
If the GPIO_1_6 is being used for some other peripheral,
this patch can be followed to route the ENET interrupt to
any other GPIO though a HW mode maybe required.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Use universal equation and 25C's calibration data to
get thermal sensor's ratio on i.MX6DL.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Correct code to remove unnecessary GPU frequency scaling updte.
This patch is from vivante.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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When doing video playback on video16, which is also the first framebuffer
and used for fb console as well, there is a color bar on top of 1080p screen.
We need to make sure the correct vmode when doing pan display.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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