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* drm/nouveau/pwr: add support for GK20AVince Hsu2015-01-224-0/+235
| | | | | | | | | | | | | This patch adds PWR support for GK20A. But instead of adding the PWR features like firmware loading and communication with PMU firmware, we add the DVFS (Dynamic Voltage and Frequency Scaling), which is one of the PMU firmware's jobs on dGPUs, in this patch. This refers to the idle signals provided by the NVIDIA hardware and tries to adjust the performance level based on the calculated target. The reclocking policy can be fine-tuned later when we have more real use cases. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pwr: make nouveau_pwr_pgob() non-staticVince Hsu2015-01-222-1/+2
| | | | | | | | | The platform device does not use the common nouveau_pwr_init() to initialize the PWR, but it does need the .pgob() be assigned to avoid NULL pointer dereference in graph/nve4.c. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk: allow non-blocking for nouveau_clock_astate()Vince Hsu2015-01-222-3/+3
| | | | | | | | | | | There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: add missing bracesVince Hsu2015-01-221-1/+2
| | | | | | | | | Several braces were misplaced unintentionally. That caused the msi handling became part of the default case of the first switch statement. So add the missing ones. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/kms: reject attempts at flipping to incompatible framebufferBen Skeggs2015-01-221-0/+4
| | | | | | | | | | | | | Looks like a userspace bug can trigger this somehow during a mode switch, causing: EVO complaint -> semaphores get out of sync -> entire display stalled. We likely want to be even stricter than this (or at least deal better if EVO rejects our request), but I'll save that for the drm_plane/atomic conversion and just fix the bug that I already know can be triggered. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/kms: default to panel scaling, except for fixed panels prior to nv50Ben Skeggs2015-01-221-5/+9
| | | | | | | On NV50 and up, we'll allow fixed panels to use EDID-provided modes without the GPU scaler, and force scaling (even for NONE) otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/kms: untangle connector property logic a littleBen Skeggs2015-01-221-16/+37
| | | | | | Should be the same defaults as before, just easier to follow. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/kms: avoid adding scaler-only modes the same as the panel's ↵Ben Skeggs2015-01-221-1/+3
| | | | | | native mode Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/kms: allow disabling of gpu scaling on fixed panelsBen Skeggs2015-01-223-10/+44
| | | | | | | | | | The hilarious part is that, under X, this won't work anyway because the server decides to construct its own modes for some reason. Tested with modetest, which isn't quite as insane. I'd hope that wayland is more sensible. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/kms: move identical scaler mode fixup code into a functionBen Skeggs2015-01-221-54/+24
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: sgdma: add comment around suspiscious error handlerAlexandre Courbot2015-01-221-0/+5
| | | | | | | | | | | | Common programming sense dictates that resources allocated by a function are freed by this function should it fails, but this is not the case for the allocated structure of nouveau_sgdma_create_ttm(). It seems that n00b contributors attempt to fix this one like bugs flying towards a bug zapper, so add a comment to hopefully prevent this from happening anymore. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: sgdma: remove unused nouveau_sgdma_be::devAlexandre Courbot2015-01-221-2/+0
| | | | | | | | nouveau_sgdma_be::dev is only set once during init and never used anywhere, so remove it. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: object.engine is always a nouveau_engine nowBen Skeggs2015-01-2218-33/+30
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: can now assume client/device object tree based on ↵Ben Skeggs2015-01-222-7/+10
| | | | | | object.engine Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp: outp/conns do not have an engineBen Skeggs2015-01-225-8/+7
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bar: barobjs may not have an engineBen Skeggs2015-01-221-4/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb: ram impl does not have an engineBen Skeggs2015-01-221-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c: pad/ports do not have an engineBen Skeggs2015-01-2210-27/+27
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem: instobjs may not have an engineBen Skeggs2015-01-223-11/+12
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: fix subdev/engine/device lookup to not require engine pointerBen Skeggs2015-01-223-21/+20
| | | | | | | It's about to not be valid for objects that aren't in the client object tree. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: uninline subdev/engine/device lookup functionsBen Skeggs2015-01-226-38/+44
| | | | | | These are a tad more complex than a direct cast with paranoia safeties. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: prepare printk for NULL engine pointer on device object treeBen Skeggs2015-01-221-8/+13
| | | | | | | | | | | | The [ SUBDEV] specified in log output will be a bit different for children of a subdev now. Previously this reports whatever subdev is specified by object.engine, now it reports the subdev that owns the object (so, up object.parent somewhere). Later patches will append object and class identifiers to messages, which will help clarify where it's coming from. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: drop the pointer value in debug printk outputBen Skeggs2015-01-221-2/+2
| | | | | | | | | | Makes the output slightly less useful, in that objects with the same class handle can't be distinguished from each other now. Upcoming commits will name objects with user-readable strings to fix this problem. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c: fix some blatant abuseBen Skeggs2015-01-222-3/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gf100-/bar: don't fill in bar->alloc until after all vm setup doneBen Skeggs2015-01-221-2/+4
| | | | | | | | | | | | gpuobj has a condition of (bar && bar->alloc) around usage to avoid some nasty ordering issues (which, i've now been reminded to add a todo about fixing...) between bar and vm. The bar->alloc part of the condition isn't currently necessary (it used to be, another change made bar always NULL where it matters), so we got lucky. That won't be the case for much longer. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: rename parent to handle, use parent for nouveau_parentBen Skeggs2015-01-221-10/+12
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: rename subclass.base to subclass.superclassBen Skeggs2015-01-2223-52/+51
| | | | | | | | Makes things a bit more readable. This is specially important now as upcoming commits are going to be gradually removing the use of macros for down-casts, in favour of compile-time checking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/subdev: always upcast through nouveau_subdev()/nouveau_engine()Ben Skeggs2015-01-2223-23/+23
| | | | | | | Has additional safeties for one. For two, needed for an upcoming commit that removes abuse of nouveau_object.engine. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb: remove some (now) unnecessary hacksBen Skeggs2015-01-221-2/+0
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* Merge remote-tracking branch 'origin/master' into drm-nextDave Airlie2015-01-2249-500/+614
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backmerge Linus tree after rc5 + drm-fixes went in. There were a few amdkfd conflicts I wanted to avoid, and Ben requested this for nouveau also. Conflicts: drivers/gpu/drm/amd/amdkfd/Makefile drivers/gpu/drm/amd/amdkfd/kfd_chardev.c drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c drivers/gpu/drm/amd/amdkfd/kfd_priv.h drivers/gpu/drm/amd/include/kgd_kfd_interface.h drivers/gpu/drm/i915/intel_runtime_pm.c drivers/gpu/drm/radeon/radeon_kfd.c
| * Merge tag 'drm-amdkfd-fixes-2015-01-13' of ↵Dave Airlie2015-01-215-213/+3
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~gabbayo/linux into drm-fixes - Remove the interrupt SW ring buffer impl. as it is not used by any module in amdkfd. - Fix a sparse warning * tag 'drm-amdkfd-fixes-2015-01-13' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: Fix sparse warning (different address space) drm/amdkfd: Drop interrupt SW ring buffer
| | * drm/amdkfd: Fix sparse warning (different address space)Oded Gabbay2015-01-081-1/+1
| | | | | | | | | | | | Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
| | * drm/amdkfd: Drop interrupt SW ring bufferMichel Dänzer2015-01-084-212/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The work queue couldn't reliably prevent the SW ring buffer from overflowing, so dmesg was spammed by kfd kfd: Interrupt ring overflow, dropping interrupt. messages when running e.g. the Atlantis Substance demo from https://wiki.unrealengine.com/Linux_Demos on Kaveri. Since the SW ring buffer doesn't actually do anything at this point, just remove it for now. When actual interrupt processing code is added to amdkfd, it should try to do things immediately and only defer to work queues when necessary. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
| * | Merge tag 'drm-intel-fixes-2015-01-15' of ↵Dave Airlie2015-01-215-15/+24
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel into drm-fixes misc i915 fixes * tag 'drm-intel-fixes-2015-01-15' of git://anongit.freedesktop.org/drm-intel: drm/i915: Fix mutex->owner inspection race under DEBUG_MUTEXES drm/i915: Ban Haswell from using RCS flips drm/i915: vlv: sanitize RPS interrupt mask during GPU idling drm/i915: fix HW lockup due to missing RPS IRQ workaround on GEN6 drm/i915: gen9: fix RPS interrupt routing to CPU vs. GT
| | * | drm/i915: Fix mutex->owner inspection race under DEBUG_MUTEXESChris Wilson2015-01-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_DEBUG_MUTEXES is set, the mutex->owner field is only cleared if the mutex debugging is enabled which introduces a race in our mutex_is_locked_by() - i.e. we may inspect the old owner value before it is acquired by the new task. This is the root cause of this error: diff --git a/kernel/locking/mutex-debug.c b/kernel/locking/mutex-debug.c index 5cf6731..3ef3736 100644 --- a/kernel/locking/mutex-debug.c +++ b/kernel/locking/mutex-debug.c @@ -80,13 +80,13 @@ void debug_mutex_unlock(struct mutex *lock) DEBUG_LOCKS_WARN_ON(lock->owner != current); DEBUG_LOCKS_WARN_ON(!lock->wait_list.prev && !lock->wait_list.next); - mutex_clear_owner(lock); } /* * __mutex_slowpath_needs_to_unlock() is explicitly 0 for debug * mutexes so that we can do it here after we've verified state. */ + mutex_clear_owner(lock); atomic_set(&lock->count, 1); } Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87955 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: Ban Haswell from using RCS flipsChris Wilson2015-01-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like Ivybridge, we have reports that we get random hangs when flipping with multiple pipes. Extend commit 2a92d5bca1999b69c78f3c3e97b5484985b094b9 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Jul 8 10:40:29 2014 +0100 drm/i915: Disable RCS flips on Ivybridge to also apply to Haswell. Reported-and-tested-by: Scott Tsai <scottt.tw@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87759 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org # 2a92d5bca199 drm/i915: Disable RCS flips on Ivybridge Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: vlv: sanitize RPS interrupt mask during GPU idlingImre Deak2015-01-122-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We apply the RPS interrupt workaround on VLV everywhere except when writing the mask directly during idling the GPU. For consistency do this also there. While at it also extend the code comment about affected platforms. I couldn't reproduce the issue on VLV fixed by this workaround, by removing the workaround from everywhere, while it's 100% reproducible on SNB using igt/gem_reset_stats/ban-ctx-render. So also add a note that it hasn't been verified if the workaround really applies to VLV/CHV. Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: fix HW lockup due to missing RPS IRQ workaround on GEN6Imre Deak2015-01-123-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit dbea3cea69508e9d548ed4a6be13de35492e5d15 Author: Imre Deak <imre.deak@intel.com> Date: Mon Dec 15 18:59:28 2014 +0200 drm/i915: sanitize RPS resetting during GPU reset we disable RPS interrupts during GPU resetting, but don't apply the necessary GEN6 HW workaround. This leads to a HW lockup during a subsequent "looping batchbuffer" workload. This is triggered by the testcase that submits exactly this kind of workload after a simulated GPU reset. I'm not sure how likely the bug would have triggered otherwise, since we would have applied the workaround anyway shortly after the GPU reset, when enabling GT powersaving from the deferred work. This may also fix unrelated issues, since during driver loading / suspending we also disable RPS interrupts and so we also had a short window during the rest of the loading / resuming where a similar workload could run without the workaround applied. v2: - separate the fix to route RPS interrupts to the CPU on GEN9 too to a separate patch (Daniel) Bisected-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Testcase: igt/gem_reset_stats/ban-ctx-render Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87429 Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| | * | drm/i915: gen9: fix RPS interrupt routing to CPU vs. GTImre Deak2015-01-121-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GEN8+ HW has the option to route PM interrupts to either the CPU or to GT. For GEN8 this was already set correctly to routing to CPU, but not for GEN9, so fix this. Note that when disabling RPS interrupts this was set already correctly, though in that case it didn't matter much except for the possibility of spurious interrupts. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
| * | drm: fb helper should avoid sleeping in panic contextRui Wang2015-01-211-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are still some places in the fb helper that need to avoid sleeping in panic context. Here's an example: [ 65.615496] bad: scheduling from the idle thread! [ 65.620747] CPU: 92 PID: 0 Comm: swapper/92 Tainted: G M E 3.18.0-rc4-7-default+ #20 [ 65.630364] Hardware name: Intel Corporation BRICKLAND/BRICKLAND, BIOS BRHSXSD1.86B.0056.R01.1409242327 09/24/2014 [ 65.641923] ffff88087f693d80 ffff88087f689878 ffffffff81566db9 0000000000000000 [ 65.650226] ffff88087f693d80 ffff88087f689898 ffffffff810871ff ffff88046eb3e0d0 [ 65.658527] ffff88087f693d80 ffff88087f6898c8 ffffffff8107c1fa 000000017f6898b8 [ 65.666830] Call Trace: [ 65.669557] <#MC> [<ffffffff81566db9>] dump_stack+0x46/0x58 [ 65.675994] [<ffffffff810871ff>] dequeue_task_idle+0x2f/0x40 [ 65.682412] [<ffffffff8107c1fa>] dequeue_task+0x5a/0x80 [ 65.688345] [<ffffffff810804f3>] deactivate_task+0x23/0x30 [ 65.694569] [<ffffffff81569050>] __schedule+0x580/0x7f0 [ 65.700502] [<ffffffff81569739>] schedule_preempt_disabled+0x29/0x70 [ 65.707696] [<ffffffff8156abb6>] __ww_mutex_lock_slowpath+0xb8/0x162 [ 65.714891] [<ffffffff8156acb3>] __ww_mutex_lock+0x53/0x85 [ 65.721125] [<ffffffffa00b3a5d>] drm_modeset_lock+0x3d/0x110 [drm] [ 65.728132] [<ffffffffa00b3c2a>] __drm_modeset_lock_all+0x8a/0x120 [drm] [ 65.735721] [<ffffffffa00b3cd0>] drm_modeset_lock_all+0x10/0x30 [drm] [ 65.743015] [<ffffffffa01af8bf>] drm_fb_helper_pan_display+0x2f/0xf0 [drm_kms_helper] [ 65.751857] [<ffffffff8132bd21>] fb_pan_display+0xd1/0x1a0 [ 65.758081] [<ffffffff81326010>] bit_update_start+0x20/0x50 [ 65.764400] [<ffffffff813259f2>] fbcon_switch+0x3a2/0x550 [ 65.770528] [<ffffffff813a01c9>] redraw_screen+0x189/0x240 [ 65.776750] [<ffffffff81322f8a>] fbcon_blank+0x20a/0x2d0 [ 65.782778] [<ffffffff8137d359>] ? erst_writer+0x209/0x330 [ 65.789002] [<ffffffff810ba2f3>] ? internal_add_timer+0x63/0x80 [ 65.795710] [<ffffffff810bc137>] ? mod_timer+0x127/0x1e0 [ 65.801740] [<ffffffff813a0cd8>] do_unblank_screen+0xa8/0x1d0 [ 65.808255] [<ffffffff813a0e10>] unblank_screen+0x10/0x20 [ 65.814381] [<ffffffff812ca0d9>] bust_spinlocks+0x19/0x40 [ 65.820508] [<ffffffff81561ca7>] panic+0x106/0x1f5 [ 65.825955] [<ffffffff8102336c>] mce_panic+0x2ac/0x2e0 [ 65.831789] [<ffffffff812c796a>] ? delay_tsc+0x4a/0x80 [ 65.837625] [<ffffffff81024e1f>] do_machine_check+0xbaf/0xbf0 [ 65.844138] [<ffffffff813365d7>] ? intel_idle+0xc7/0x150 [ 65.850166] [<ffffffff8156f03f>] machine_check+0x1f/0x30 [ 65.856195] [<ffffffff813365d7>] ? intel_idle+0xc7/0x150 [ 65.862222] <<EOE>> [<ffffffff814283d5>] cpuidle_enter_state+0x55/0x170 [ 65.869823] [<ffffffff814285a7>] cpuidle_enter+0x17/0x20 [ 65.875852] [<ffffffff81097b08>] cpu_startup_entry+0x2d8/0x370 [ 65.882467] [<ffffffff8102fe29>] start_secondary+0x159/0x180 There's __drm_modeset_lock_all() which Daniel Vetter introduced for this purpose. We can leverage that without reinventing anything. This patch works with the latest kernel. Reviewed-by: Rob Clark <robdclark@gmail.com> Tested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rui Wang <rui.y.wang@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge branch 'exynos-drm-fixes' of ↵Dave Airlie2015-01-213-23/+8
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes This pull request includes below fixups, - Remove duplicated machine checking. . It seems that this code was added when you merged 'v3.18-rc7' into drm-next. commit id : e8115e79aa62b6ebdb3e8e61ca4092cc32938afc - Fix hdmiphy reset. . Exynos hdmi has two interfaces to control hdmyphy, one is I2C, other is APB bus - memory mapped I/O. So this patch makes hdmiphy reset to be done according to interfaces, I2C or APB bus. - And add some exception codes. * 'exynos-drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: fix warning of vblank reference count drm/exynos: remove unnecessary runtime pm operations drm/exynos: fix reset codes for memory mapped hdmi phy drm/exynos: remove the redundant machine checking code
| | * | drm/exynos: fix warning of vblank reference countJoonyoung Shim2015-01-181-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevented re-enabling the vblank interrupt by drm_vblank_off and drm_vblank_get from mixer_wait_for_vblank returns error after drm_vblank_off. We get below warnings without this error handling because vblank reference count is mismatched by above sequence. setting mode 1920x1080-60Hz@XR24 on connectors 16, crtc 13 [ 19.900793] ------------[ cut here ]------------ [ 19.903959] WARNING: CPU: 0 PID: 0 at drivers/gpu/drm/drm_irq.c:1072 exynos_drm_crtc_finish_pageflip+0xac/0xdc() [ 19.914076] Modules linked in: [ 19.917116] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.19.0-rc4-00040-g3d729789-dirty #46 [ 19.925342] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [ 19.931437] [<c0014430>] (unwind_backtrace) from [<c001158c>] (show_stack+0x10/0x14) [ 19.939131] [<c001158c>] (show_stack) from [<c04cdd50>] (dump_stack+0x84/0xc4) [ 19.946329] [<c04cdd50>] (dump_stack) from [<c00226f4>] (warn_slowpath_common+0x80/0xb0) [ 19.954382] [<c00226f4>] (warn_slowpath_common) from [<c00227c0>] (warn_slowpath_null+0x1c/0x24) [ 19.963132] [<c00227c0>] (warn_slowpath_null) from [<c02c20cc>] (exynos_drm_crtc_finish_pageflip+0xac/0xdc) [ 19.972841] [<c02c20cc>] (exynos_drm_crtc_finish_pageflip) from [<c02cb7ec>] (mixer_irq_handler+0xdc/0x104) [ 19.982546] [<c02cb7ec>] (mixer_irq_handler) from [<c005c904>] (handle_irq_event_percpu+0x78/0x134) [ 19.991555] [<c005c904>] (handle_irq_event_percpu) from [<c005c9fc>] (handle_irq_event+0x3c/0x5c) [ 20.000395] [<c005c9fc>] (handle_irq_event) from [<c005f384>] (handle_fasteoi_irq+0xe0/0x1ac) [ 20.008885] [<c005f384>] (handle_fasteoi_irq) from [<c005bf88>] (generic_handle_irq+0x2c/0x3c) [ 20.017463] [<c005bf88>] (generic_handle_irq) from [<c005c254>] (__handle_domain_irq+0x7c/0xec) [ 20.026128] [<c005c254>] (__handle_domain_irq) from [<c0008698>] (gic_handle_irq+0x30/0x68) [ 20.034449] [<c0008698>] (gic_handle_irq) from [<c00120c0>] (__irq_svc+0x40/0x74) [ 20.041893] Exception stack(0xc06fff68 to 0xc06fffb0) [ 20.046923] ff60: 00000000 00000000 000052f6 c001b460 c06fe000 c07064e8 [ 20.055070] ff80: c04d743c c07392a2 c0739440 c06da340 ef7fca80 00000000 01000000 c06fffb0 [ 20.063212] ffa0: c000f24c c000f250 60000013 ffffffff [ 20.068245] [<c00120c0>] (__irq_svc) from [<c000f250>] (arch_cpu_idle+0x38/0x3c) [ 20.075611] [<c000f250>] (arch_cpu_idle) from [<c0050948>] (cpu_startup_entry+0x108/0x16c) [ 20.083846] [<c0050948>] (cpu_startup_entry) from [<c06aec5c>] (start_kernel+0x3a0/0x3ac) [ 20.091980] ---[ end trace 2c76ee0500489d1b ]--- Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: remove unnecessary runtime pm operationsJoonyoung Shim2015-01-181-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In booting, we can see a below message. [ 3.241728] exynos-mixer 14450000.mixer: Unbalanced pm_runtime_enable! Already pm_runtime_enable is called by probe function. Remove pm_runtime_enable/disable from mixer_bind and mixer_unbind. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: fix reset codes for memory mapped hdmi phyJoonyoung Shim2015-01-181-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes reset codes to support memory mapped hdmi phy as well as hdmi phy dedicated i2c lines. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| | * | drm/exynos: remove the redundant machine checking codeHyungwon Hwang2015-01-121-12/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This code is unnecessary, because same logic is already included. Refer this mail thread[1] for detail. [1] http://lists.freedesktop.org/archives/dri-devel/2015-January/075132.html Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
| * | drm/radeon: use rv515_ring_start on r5xxAlex Deucher2015-01-151-2/+16
| | | | | | | | | | | | | | | | | | | | | This was accidently lost in 76a0df859def. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: add si dpm quirk listAlex Deucher2015-01-121-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a quirks list to fix stability problems with certain SI boards. bug: https://bugs.freedesktop.org/show_bug.cgi?id=76490 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: don't print error on -ERESTARTSYSChristian König2015-01-121-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: add a dpm quirk listAlex Deucher2015-01-081-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable dpm on certain problematic boards rather than disabling dpm for the entire chip family since most boards work fine. https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1386534 https://bugzilla.kernel.org/show_bug.cgi?id=83731 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: fix VM flush on CIK (v3)Alex Deucher2015-01-082-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to wait for the GPUVM flush to complete. There was some confusion as to how this mechanism was supposed to work. The operation is not atomic. For GPU initiated invalidations you need to read back a VM register to introduce enough latency for the update to complete. v2: drop gart changes v3: just read back rather than polling Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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