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path: root/drivers/gpu/drm/nouveau/nvkm
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* drm/nouveau/ce/ga100-: initial supportBen Skeggs2022-11-095-0/+138
* drm/nouveau/fifo: add new channel classesBen Skeggs2022-11-0946-1501/+358
* drm/nouveau/fifo: add new engine object handlingBen Skeggs2022-11-0922-228/+94
* drm/nouveau/fifo: add new engine context handlingBen Skeggs2022-11-0938-921/+382
* drm/nouveau/fifo: add RAMFC info to nvkm_chan_funcBen Skeggs2022-11-0928-321/+481
* drm/nouveau/fifo: add USERD info to nvkm_chan_funcBen Skeggs2022-11-0922-113/+147
* drm/nouveau/fifo: add RAMIN info to nvkm_chan_funcBen Skeggs2022-11-0915-18/+62
* drm/nouveau/fifo: add common runlist controlBen Skeggs2022-11-0934-504/+283
* drm/nouveau/fifo: add common channel recoveryBen Skeggs2022-11-0919-605/+559
* drm/nouveau/fifo: kill channel on NV_PPBDMA_INTR_1_CTXNOTVALIDBen Skeggs2022-11-093-0/+30
* drm/nouveau/fifo: kill channel on a selection of PBDMA errorsBen Skeggs2022-11-091-3/+3
* drm/nouveau/fifo: add chan/cgrp preempt()Ben Skeggs2022-11-0919-86/+102
* drm/nouveau/fifo: add chan start()/stop()Ben Skeggs2022-11-0926-105/+187
* drm/nouveau/fifo: add chan bind()/unbind()Ben Skeggs2022-11-0917-37/+115
* drm/nouveau/fifo: add runlist block()/allow()Ben Skeggs2022-11-0913-14/+95
* drm/nouveau/fifo: add runlist wait()Ben Skeggs2022-11-0914-32/+98
* drm/nouveau/fifo: add new engine context trackingBen Skeggs2022-11-096-9/+294
* drm/nouveau/fifo: add new channel lookup interfacesBen Skeggs2022-11-0926-124/+161
* drm/nouveau/fifo: merge mmu fault handlers togetherBen Skeggs2022-11-0914-335/+183
* drm/nouveau/fifo: move PBDMA intr to runqBen Skeggs2022-11-098-102/+84
* drm/nouveau/fifo: move PBDMA init to runqBen Skeggs2022-11-0915-74/+36
* drm/nouveau/fifo: program NV_PFIFO_FB_TIMEOUT on initBen Skeggs2022-11-092-0/+2
* drm/nouveau/fifo: tidy global PBDMA initBen Skeggs2022-11-0914-32/+52
* drm/nouveau/fifo: tidy up non-stall intr handlingBen Skeggs2022-11-0919-116/+88
* drm/nouveau/fifo: use explicit intr interfacesBen Skeggs2022-11-0917-89/+105
* drm/nouveau/fifo: use runlist engine info to lookup engine classesBen Skeggs2022-11-0921-145/+35
* drm/nouveau/fifo: add cgrp, have all channels be part of oneBen Skeggs2022-11-0912-15/+227
* drm/nouveau/fifo: expose per-runlist CHID informationBen Skeggs2022-11-091-0/+9
* drm/nouveau/fifo: expose runlist topology info on all chipsetsBen Skeggs2022-11-0913-72/+51
* drm/nouveau/fifo: add common runlist/engine topologyBen Skeggs2022-11-0924-43/+566
* drm/nouveau/fifo: add runqBen Skeggs2022-11-0916-27/+151
* drm/nouveau/fifo: add chid allocatorBen Skeggs2022-11-0925-21/+206
* drm/nouveau/fifo: merge gk104_fifo_func into nvkm_host_funcBen Skeggs2022-11-0914-111/+219
* drm/nouveau/fifo: pre-move some blocks of code aroundBen Skeggs2022-11-096-400/+400
* drm/nouveau/fifo: unify handling of channel classesBen Skeggs2022-11-0933-189/+400
* drm/nouveau/fifo: add chid_nr()Ben Skeggs2022-11-0923-135/+113
* drm/nouveau/imem: allow bar2 mapping of user allocationsBen Skeggs2022-11-094-5/+43
* drm/nouveau/flcn: show falcon user in debug outputBen Skeggs2022-11-091-4/+3
* drm/nouveau/nvkm: add locking to subdev/engine init pathsBen Skeggs2022-11-092-60/+120
* drm/nouveau/mc/ga100: switch to using NV_PMC_DEVICE_ENABLEBen Skeggs2022-11-091-3/+44
* drm/nouveau/mc: move NV_PMC_ENABLE bashing to chipset-specific codeBen Skeggs2022-11-0916-11/+56
* drm/nouveau/mc: implement intr handling on top of nvkm_intrBen Skeggs2022-11-0920-573/+283
* drm/nouveau/fault/ga100: initial supportBen Skeggs2022-11-091-0/+6
* drm/nouveau/fault/tu102: switch to explicit intr handlersBen Skeggs2022-11-093-72/+50
* drm/nouveau/vfn/tu102-: support new-style interrupt treeBen Skeggs2022-11-095-15/+97
* drm/nouveau/vfn: move NV_USERMODE class from hostBen Skeggs2022-11-0914-91/+59
* drm/nouveau/vfn: add stub subdev for dev_funcBen Skeggs2022-11-099-0/+178
* drm/nouveau/intr: add nvkm_subdev_intr() compatibilityBen Skeggs2022-11-091-0/+61
* drm/nouveau/intr: support multiple trees, and explicit interfacesBen Skeggs2022-11-091-2/+282
* drm/nouveau/intr: add shared interrupt plumbing between pci/tegraBen Skeggs2022-11-096-73/+139