summaryrefslogtreecommitdiff
path: root/drivers/clk
Commit message (Expand)AuthorAgeFilesLines
* vexpress: Initialise the sysregs before setting up the clocksCatalin Marinas2014-05-041-0/+2
* Merge tag 'vexpress/fixes-for-3.15' of git://git.linaro.org/people/pawel.moll...Arnd Bergmann2014-04-241-1/+1
|\
| * clk: vexpress: NULL dereference on error pathDan Carpenter2014-04-241-1/+1
* | clk: tegra: remove non-existent clocksStephen Warren2014-04-241-3/+0
|/
* Merge tag 'mfd-for-linus-3.15' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2014-04-071-4/+0
|\
| * mfd: omap-usb-host: Get clocks based on hardware revisionRoger Quadros2014-03-131-4/+0
* | Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2014-04-0548-698/+5161
|\ \
| * | clk: shmobile: fix setting paretn clock rateBen Dooks2014-04-021-1/+1
| * | clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1Ben Dooks2014-03-311-4/+4
| * | clk: Fix minor errors in of_clk_init() function commentsSylwester Nawrocki2014-03-271-2/+2
| * | clk: reverse default clk provider initialization order in of_clk_init()Sylwester Nawrocki2014-03-271-1/+1
| * | clk: sirf: update copyright years to 2014Barry Song2014-03-263-3/+6
| * | clk: mmp: try to use closer one when do round rateChao Xie2014-03-261-3/+7
| * | clk: mmp: fix the wrong calculation formulaChao Xie2014-03-261-5/+5
| * | clk: mmp: fix wrong mask when calculate denominatorChao Xie2014-03-261-1/+1
| * | clk: st: Support for A9 MUX clocksGabriel FERNANDEZ2014-03-251-0/+19
| * | clk: st: Support for ClockGenA9/DDR/GPUGabriel FERNANDEZ2014-03-251-0/+139
| * | clk: st: Support for QUADFS inside ClockGenB/C/D/E/FGabriel FERNANDEZ2014-03-252-1/+1040
| * | clk: st: Support for VCC-mux and MUX clocksGabriel FERNANDEZ2014-03-251-0/+272
| * | clk: st: Support for PLLs inside ClockGenA(s)Gabriel FERNANDEZ2014-03-253-1/+608
| * | clk: st: Support for DIVMUX and PreDiv ClocksGabriel FERNANDEZ2014-03-253-0/+531
| * | clk: support hardware-specific debugfs entriesAlex Elder2014-03-241-0/+4
| * | clk: s2mps11: Use of_get_child_by_nameKrzysztof Kozlowski2014-03-241-1/+1
| * | clk: s2mps11: Fix possible NULL pointer dereferenceKrzysztof Kozlowski2014-03-241-1/+1
| * | clk: hisilicon: fix warning from smatchZhangfei Gao2014-03-201-8/+7
| * | clk: shmobile: add CPG driver for rz-platformsWolfram Sang2014-03-202-0/+104
| * | clk: turn rate change failed warning into pr_debugSascha Hauer2014-03-201-1/+1
| * | clk: respect the clock dependencies in of_clk_initGregory CLEMENT2014-03-191-4/+79
| * | clk: mpc85xx: Update the driver to align to new clock bindingsTang Yuantian2014-03-191-22/+48
| * | clk: at91: optimization of the set_rate callbackJean-Jacques Hiblot2014-03-191-30/+8
| * | clk: at91: fix programmable clk irq handlingJean-Jacques Hiblot2014-03-192-93/+89
| * | clk: at91: propagate rate change on system clksBoris BREZILLON2014-03-191-1/+1
| * | clk: at91: replace prog clk round_rate with determine_rateBoris BREZILLON2014-03-191-28/+28
| * | Merge tag 'clk-hisi' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhua...Mike Turquette2014-03-196-39/+129
| |\ \
| | * | clk: hisi: remove static variableHaojian Zhuang2014-03-194-42/+72
| | * | clk: hip04: add clock driverHaojian Zhuang2014-03-193-1/+59
| | * | clk: hisi: assign missing clk to tableHaojian Zhuang2014-03-191-0/+2
| | |/
| * | clk: sunxi: fix thinko in commentEmilio López2014-03-191-1/+1
| * | clk: sunxi: fix some calculationsEmilio López2014-03-191-3/+3
| * | clk: sunxi: fix A20 PLL4 calculationEmilio López2014-03-191-0/+7
| * | Merge tag 'sunxi-clk-for-3.15' of https://bitbucket.org/emiliolopez/linux int...Mike Turquette2014-03-191-25/+265
| |\ \
| | * | clk: sunxi: Add new clock compatiblesMaxime Ripard2014-02-181-15/+15
| | * | clk: sunxi: Add Allwinner A20/A31 GMAC clock unitChen-Yu Tsai2014-02-181-0/+96
| | * | clk: sunxi: Add support for PLL6 on the A31Maxime Ripard2014-02-181-0/+45
| | * | clk: sunxi: Add USB clock register defintionsRoman Byshko2014-02-181-0/+12
| | * | clk: sunxi: Add support for USB clock-register reset bitsHans de Goede2014-02-181-0/+71
| | * | clk: sunxi: get divs parent clock name from parent factor clockChen-Yu Tsai2014-02-031-1/+2
| | * | clk: sunxi: add names for pll5, pll6 parent clocks to factors_dataChen-Yu Tsai2014-02-031-9/+18
| | * | clk: sunxi: add clock-output-names dt property supportChen-Yu Tsai2014-02-031-0/+6
| | |/
| * | clk: socfpga: Fix section mismatch warningDinh Nguyen2014-03-181-1/+1
View Lorry Controller Status