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path: root/drivers/clk/tegra
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* clk: tegra: Add the DFLL as a possible parent of the cclk_g clockTuomas Tynkkynen2014-12-061-1/+3
* clk: tegra: Save/restore CCLKG_BURST_POLICY on suspendTuomas Tynkkynen2014-12-061-0/+14
* clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen2014-12-062-0/+167
* clk: tegra: Add DFLL DVCO reset control for Tegra124Paul Walmsley2014-12-062-0/+50
* clk: tegra: Add functions for parsing CVB tablesTuomas Tynkkynen2014-12-062-0/+200
* clk: tegra: Add closed loop support for the DFLLTuomas Tynkkynen2014-12-061-3/+654
* clk: tegra: Add library for the DFLL clock source (open-loop mode)Tuomas Tynkkynen2014-12-063-0/+1146
* clk: tegra: Make clock initialization more robustTomeu Vizoso2014-09-181-2/+7
* clk: tegra124: Add PLL_M_UD and PLL_C_UD clocksMikko Perttunen2014-09-181-0/+8
* Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds2014-08-083-3/+8
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| * ARM: tegra: Convert PMC to a driverThierry Reding2014-07-171-1/+1
| * ARM: tegra: Move includes to include/soc/tegraThierry Reding2014-07-173-3/+8
* | clk: tegra: Use XUSB-compatible SATA PLL sequenceMikko Perttunen2014-07-081-0/+11
* | clk: tegra: export clock names for debuggingPeter De Schrijver2014-06-301-0/+6
* | clk: tegra124: init table updatesPeter De Schrijver2014-06-271-0/+6
* | clk: tegra: Add SATA clocks to Tegra124 initialization tableMikko Perttunen2014-06-251-0/+2
* | clk: tegra: Enable hardware control of SATA PLLMikko Perttunen2014-06-251-0/+8
* | clk: tegra: fix vi_sensor clocks on Tegra124Peter De Schrijver2014-06-253-4/+33
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* Merge branch 'clk-fixes' into clk-nextMike Turquette2014-05-281-21/+43
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| * Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijv...Mike Turquette2014-05-271-21/+43
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| | * clk: tegra: Fix enabling of PLLEThierry Reding2014-04-171-1/+1
| | * clk: tegra: Introduce divider mask and shift helpersThierry Reding2014-04-171-20/+24
| | * clk: tegra: Fix PLLE programmingThierry Reding2014-04-171-6/+24
* | | clk: tegra: Initialize xusb clocksAndrew Bresticker2014-05-222-1/+12
* | | clk: tegra: Fix xusb_hs_src clock hierarchyAndrew Bresticker2014-05-224-20/+17
* | | clk: tegra: Fix xusb_fs_src muxJim Lin2014-05-221-1/+3
* | | clk: tegra: Enable hardware control of PLLEJim Lin2014-05-221-1/+32
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* | clk: tegra: Fix wrong value written to PLLE_AUXTuomas Tynkkynen2014-05-161-1/+1
* | clk: tegra: remove non-existent clocksStephen Warren2014-04-241-3/+0
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* Merge branch 'clk-fixes' into clk-nextMike Turquette2014-02-247-31/+45
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| * clk: tegra124: remove gr2d and gr3d clocksPeter De Schrijver2014-02-201-2/+0
| * clk: tegra: Fix vic03 mux indexPeter De Schrijver2014-02-201-3/+1
| * clk: tegra: use max divider if divider overflowsAndrew Bresticker2014-02-171-1/+1
| * clk: tegra: cclk_lp has a pllx/2 dividerAndrew Bresticker2014-02-171-1/+1
| * clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker2014-02-174-8/+16
| * clk: tegra: fix host1x clock on Tegra124Mark Zhang2014-02-171-1/+1
| * clk: tegra: PLLD2 fixes for hdmiDavid Ung2014-02-171-8/+7
| * clk: tegra: Fix PLLD mnp tableRhyland Klein2014-02-171-1/+10
| * clk: tegra: Fix PLLP rate tableGabe Black2014-02-171-5/+5
| * clk: tegra: Correct clock number for UARTEThierry Reding2014-02-171-1/+1
| * clk: tegra: Add missing Tegra20 fuse clksPeter De Schrijver2014-02-171-0/+2
* | clk: tegra: Staticize tegra_clk_periph_no_gate_opsSachin Kamat2014-02-231-1/+1
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* Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...Linus Torvalds2014-01-232-7/+7
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| * clk: tegra: Staticize tegra_clk_periph_nodiv_opsSachin Kamat2013-12-191-1/+1
| * clk: tegra: Staticize local variables in clk-pll.cSachin Kamat2013-12-191-6/+6
* | clk: tegra: remove bogus PCIE_XCLKStephen Warren2013-12-112-13/+0
* | clk: tegra: remove legacy reset APIsStephen Warren2013-12-113-63/+0
* | clk: tegra: implement a reset driverStephen Warren2013-12-116-6/+57
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* clk: tegra: fix __clk_lookup() return value checksWei Yongjun2013-11-281-4/+4
* clk: tegra: Do not print errors for clk_round_rate()Thierry Reding2013-11-281-6/+3
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