| Commit message (Collapse) | Author | Age | Files | Lines |
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imx6dq have 3 i2c controllers and 5 ecspi,imx6dl have 4 i2c4
controllers and 4 ecspi. imx6dl i2c4 clock source is routed
from pll3 through to ecspi_root gate.
Add i2c4 bus support for sabresd/auto, and arm2 platforms.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Config clock,irq,mux pad,data entry, etc to setup uart5.
Signed-off-by: Jianzheng Zhou <jianzheng.zhou@freescale.com>
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Add fuse check for gpu platform device. Bypass gpu core
initialization if certain core is fused.If all gpu cores
are fused, bypass gpu driver loading.
Signed-off-by: Loren Huang <b02279@freescale.com>
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Since device availability may be different on the same SoC,
so we add fuse check for the supported device before we really
adding the device to the kernel.
This may avoid kernel crash once the CPU at the slot are changed to
a different one which with different device available but the kernel is
the same one.
Reviewed-by: Jason Liu <r64343@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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This patch add the fuse check for VPU_DISABLE feature. If the fuse
bit for VPU_DISABLE is 1, which means VPU is disabled, then we will
not register VPU device to the kernel.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Read "Disabled MLB" bit in OTP CFG2 to check if to enable mlb.
Signed-off-by: Terry Lv <r65388@freescale.com>
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- remove mx6_usb_dr_init() in board specific initialization files
- Add module_init(mx6_usb_dr_init) and module_exit(mx6_usb_dr_exit)
in usb_dr.c to support the usb_dr modulization
- Export necessary function which is used in usb_dr.c
Signed-off-by: make shi <b15407@freescale.com>
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Improve the board level suspend power by configuring
various IOMUX pads to low power state.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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We must set the DMA mask for esdhc device.
To avoid the following crash when we do not have highmem pages:
[<c0044f90>] (__dabt_svc+0x70/0xa0) from [<c00cf460>]
[<c00cf460>] (mempool_alloc+0x3c/0x108) from [<c00f4aa4>]
[<c00f4aa4>] (blk_queue_bounce+0xc0/0x2fc) from [<c023761c>]
[<c023761c>] (__make_request+0x20/0x2b8) from [<c0235bb4>]
[<c0235bb4>] (generic_make_request+0x3b4/0x4cc) from [<c0235d74>]
[<c0235d74>] (submit_bio+0xa8/0x128) from [<c01279c4>]
[<c01279c4>] (submit_bh+0x108/0x178) from [<c012baa0>]
[<c012baa0>] (block_read_full_pag+e0x278/0x394) from [<c00cd520>]
[<c00cd520>] (do_read_cache_page+0x70/0x154) from [<c00cd64c>]
[<c00cd64c>] (read_cache_page_async+0x1c/0x24) from [<c00cd65c>]
[<c00cd65c>] (read_cache_page+0x8/0x10) from [<c014c354>]
[<c014c354>] (read_dev_sector+0x30/0x68) from [<c014dd4c>]
[<c014dd4c>] (read_lba+0xa0/0x164) from [<c014e300>]
[<c014e300>] (efi_partition+0x9c/0xed4) from [<c014ca0c>]
[<c014ca0c>] (rescan_partitions+0x15c/0x480) from [<c012f190>]
[<c012f190>] (__blkdev_get+0x324/0x394) from [<c012f300>]
[<c012f300>] (blkdev_get+0x100/0x358) from [<c023e5f4>]
[<c023e5f4>] (register_disk+0x140/0x164) from [<c023e73c>]
[<c023e73c>] (add_disk+0x124/0x2a0) from [<c03a7528>]
[<c03a7528>] (mmc_add_disk+0x10/0x68) from [<c03a7820>]
[<c03a7820>] (mmc_blk_probe+0x15c/0x20c) from [<c039cc90>]
[<c039cc90>] (mmc_bus_probe+0x18/0x1c) from [<c0294e28>]
When our DDR size is small or reserved memory are large and
the lowmem can cover all the available pages for kernel,
the highmem pages will not be setup. That means the page_pool
for bounce queue can not be create in init_emergency_pool().
And page_pool will stay NULL without initialized.
In the mmc/card/queue.c the blk_queue_bounce_limit()
function will be called in mmc_init_queue() to
initialize the request_queue and it's bounce_gfp.
If we do not define the DMA mask for our platform,
then the BLK_BOUNCE_HIGH (lowmem pfn) will be set
as limit to queue bounce, which means the blk_queue_bounce
will use page_pool to iterate over the bio segment.
Under the circumstances that highmem is not setup,
the page_pool is null, and causes kernel crash.
After set the DMA mask for esdhci device, the page_pool
will not be used to iterate over the bio segment.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Add Secure Memory and SNVS properties to MX6 configuration.
Previous configurations of MX6 platform device definition lacked
specific propeties for CAAM Secure Memory and SNVS. Added these
properties to define register ranges for both entities.
Also corrected the name for the offset of the address range for
CAAM Secure Memory to more accurately reflect it's purpose.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
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Setup uart2 to enable bluetooth basic functionality on mx6sl evk board.
DMA mode was not enabled for uart2 operation.
Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
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* Fix imx_dma_data duplicate struct definition
* Rename struct as name conflicts with imx_dma_data
struct defined at arch/arm/plat-mxc/include/mach/dma.h
* Update copyrigth year.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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- add platform data for csi driver
- change the regulator name to reflect the voltage really used
- select OSC as csi parent clock to get 24MHz
- add an boot option to use csi feature while filter out the EPDC/SPDC, since
there are pin conflicts with xPDC.
- both ov5640 and ov5642 are verified okay, ov5640 is used by default.
- remove IPU from update_defconfig
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add platform device for V4L2 support
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add thermal irq alarm function.
Signed-off-by: Anson Huang <b20788@freescale.com>
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- remove mx6_usb_h1_init() in board specific initialization files
- Add module_init(mx6_usb_h1_init) and module_exit(mx6_usb_h1_exit) in usb_h1.c
to support the usb_h1 modulization
- Export necessary function which is used in usb_h1.c
Signed-off-by: make shi <b15407@freescale.com>
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This patch will add arch support of DCP/RNGB.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The name in BANK2, "SOTPMK1" should be "OTPMK1"
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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- Changes to IOMUX to allow HDMI CEC controller to use KEY_ROW2
pin that it needs
- Add cec device in platform-mxc_hdmi.c
- Add MXC_HDMI_CEC in imx6_defconfig
Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
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1.add watchdog irq in device structure
2.modify watchdog irq macro define to meet _SOC_
Signed-off-by: Robin Gong <B38343@freescale.com>
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Register PMU resources during system bootup, so that "Perf" Command can
be used to get misc performance data of a running program
The "Perf" Exe should be built manually in
"./tools/perf" using the following command line
> make CROSS_COMPILER=... ARCH=arm CFLAGS="-static -DGElf_Nhdr=Elf32_Nhdr"
then copy the "Perf" executable to rootfs/bin
Usage :
perf # show help content
perf list # show all available statistics options
perf stat ls # show all statistics of a "ls" command
perf stat -e cycles tar cvfz bin.tgz /bin
# show "cycles" statistics of command
# "tar cvfz ...."
MX6 Series Chips bound all CPUs PERFMON IRQ to one, this may cause some
problems when get per-CPU statistics. Need further investigation
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Add baseAddress parameter for GPU resource according to different
SOC
Signed-off-by: Larry Li <b20787@freescale.com>
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Add the support for keypad on EINK-DC3 board which is stacked on ARM2 board.
- configure the iomux setting
- add dummy kpp clock to fool imx_keypad driver
- add platform device for keypad
- add key mapping (4x4 array) used on EINK-DC3
- update the defconfig for keypad driver
Signed-off-by: Robby Cai <R63905@freescale.com>
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Prepare resourec such as memory, interrupt, clock, regester address
needed by GPU.
Signed-off-by: Larry Li <b20787@freescale.com>
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- Add IOMUX pad config defines and GPIO defines
- Add platform device/data for SPDC
- Add IRQ number define for SPDC
Signed-off-by: Fugang Duan <B38611@freescale.com>
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check CONFIG_ARCH_MX6 to replace cpu type
Signed-off-by: Gary Zhang <b13634@freescale.com>
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- update LCDIF pinmux setting (and pad ctrl setting)
- correct LCDIF pixel clock setting
- add platform device/data for lcdif
Signed-off-by: Robby Cai <R63905@freescale.com>
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fix build error
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Add FEC support for mx6-sololite:
- Add FEC pad iomux setting.
- Power on phy and init fec.
- Add devname to distinguish different IP.
- Use ANATOP as FEC clock source in default, remove redundant
config "FEC_CLOCK_FROM_ANATOP".
Signed-off-by: Fugang Duan <B38611@freescale.com>
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modify usb wakeup interrupt number for mx6sl
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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- in mx6sl RM, the irq of usb h1(usb otg2) is 72, but
in fact, it should be 74, we need change the irq special
for mx6sl
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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Add CAAM device instantiation to iMX platform.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
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Add CAAM platform configuration to platform build.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
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add ssi dual-fifo info in sdma structure
Signed-off-by: Gary Zhang <b13634@freescale.com>
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* Bring up the PCIE on i.MX6 SD board
* Add the PCIE PHY access routines
* Wrapper the board related codes by register one
platform driver and data
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Update p2p script firmware address in plat-imx-dma.c for MX6Q.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Add vdoa support on i.MX6 SOC platform
Signed-off-by: Wayne Zou <b36644@freescale.com>
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This patch checks overlay fb size before reserve fb mem for
it.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit b29df373e547c83f9b3bcfd9a98016f462fa9ec2)
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- Added EPDC and EPD PMIC (Maxim 17135) to MX6Q ARM2 board file
- Added EPDC-related IOMUX and GPIO settings
- Added EPDC clock configuration settings to clock file
- Updated config files with EPDC and Maxim 17135 config entries
Signed-off-by: Danny Nold <dannynold@freescale.com>
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MSL part for ePxP v2 driver
Signed-off-by: Robby Cai <R63905@freescale.com>
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bit16 of GPR11 must be set to enable performance monitor
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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remove the workaround
For TO1.0: bit16 of GPR11 must be set to enable perfmon
For TO1.1 and later: bit0 of GPR11 is enable bit for perfmon.
set 1/0 to enable/disable perfmon
add workaround for mx6dl
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Disable vpu iram since mx6dl platform iram isn't enough
for vpu after VDOA/audio used it.
Signed-off-by: Sammy He <r62914@freescale.com>
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i.mx6dl and i.mx6q share the same ARM2 board due to the pin-pin
compatible between them.
Signed-off-by: Jason Liu <r64343@freescale.com>
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add i.mx6dl support for sdma
Signed-off-by: Jason Liu <r64343@freescale.com>
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rename the gpmi-nfc to gpmi-nand.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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For ARM2 and Sabreauto, change TTY0 to TTY3 (which is physical UART4)
For SabreSD, Change TTY3 to TTY0 (which is physical UART1)
Mapping Changed as the following
Physical Virtual
-------- --------
1 0
2 1
3 2
4 3
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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add sgtl5000 platform data.
VPC board is used to extend sgtl5000 hardware.
Signed-off-by: Gary Zhang <b13634@freescale.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add board level code for mlb, including platform data, clock, etc.
Signed-off-by: Terry Lv <r65388@freescale.com>
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