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* sound/soc/imx: Make SGTL5000 selectable for any machineTapani2013-07-281-3/+1
| | | | | Previously the SGTL5000 was selectable only when certain machines were being built. Remove this option and make it manually selectable.
* Fix compile break when sound is compiled as modules: ssi and esai were both ↵Tapani2013-07-281-2/+5
| | | | | | | | | | | compiled into the same module and both contain a module_init(). The fix is cleaning up sound/soc/imx/Makefile. A result is that HDMI config is not assumed always enabled. (cherry picked from commit 96b71a9a30690f3e4f8fed7e7b92dcbf7fc10a08)
* Enable headphone jack by default on sgtl5000.Tapani2013-07-281-0/+1
| | | | | | | | This patch reverts a change introduced by commit eec23c400e5c39ae338b9112031a302230220294 Conflicts: sound/soc/imx/imx-sgtl5000.c (cherry picked from commit 39405bfab671b5dbfc3ff7b41b77a0fc954b7824)
* Revert "ENGR00171026 SGTL5000: remove mono support"Tapani2013-07-281-2/+2
| | | | | This reverts commit d6612bf5c36d7f93552921fcf09e29ad2b323413. (cherry picked from commit 1af57a1e6d9473a4de0c3708cfa50d9741d3d9b7)
* Revert "gpu-viv: Avoid using uninitialized variables"John Weber2013-07-173-3/+3
| | | | | | | With the current default configuration, this commit is no longer needed. Avoid patching specialized driver files such as the GPU. This reverts commit c0fceed3315ed3167cd024a6b5a27b7c711a0d22.
* wandboard: update defconfig fileJohn Weber2013-07-171-47/+63
| | | | | | | | | | | | | | | Update the wandboard defconfig file to reflect a closer alignment to the default configurations of the Freescale reference boards. Here is a high-level summary of changes: - Disable SWAP, as we do not have a swap partition - Enable/disable certain ARM errata workarounds - Enable audio and SGTL5000 - Build all cpufreq modes - Touchscreen and keyboard input support - DRM support converted from built-in to modules - Added some USB gadget support - Added default crypto options and hardware crypto support (FSL CAAM)
* wandboard: adding Wandboard to list of SGTL5000 boardsJohn Weber2013-07-171-1/+2
| | | | | | The sound subsystem Kconfig file uses MACH_<board> to select whether the SGTL5000 is selectable as a sound device. Add Wandboard to the list of boards that are used.
* wandboard: add mipi csi supportJohn Weber2013-07-174-8/+164
| | | | | | Adds MIPI-CSI support for Wandboard Upstream-Status: Inappropriate
* wandboard: Add wireless support to defconfigJohn Weber2013-07-171-2/+4
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* Add Broadcom FullMAC wireless driver, backported from kernel 3.5rc6Tapani2013-07-1776-0/+93398
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* Remove old staging driver for Broadcom bcm4329 wifiTapani2013-07-17123-122114/+0
| | | | (cherry picked from commit 076ad8b1528a6439e9bb629951d8fea6878d1dfc)
* Remove brcm from staging area MakefileTapani2013-07-171-2/+0
| | | | (cherry picked from commit 48df1ff3c9969b00f097b8030ce4c16d5aaeeb66)
* Remove brcm config option from staging areaTapani2013-07-171-2/+0
| | | | (cherry picked from commit 70a61be9a499b24484b4da3e1ea7f69f3c0c72dd)
* ssi: add header fileJohn Weber2013-07-171-0/+1
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* gpu-viv: Avoid using uninitialized variablesJohn Weber2013-07-173-3/+3
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* wandboard: Add board supportJohn Weber2013-07-176-1/+1459
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* ENGR00271359 Add Multi-touch supportErik Boto2013-07-161-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | The previous behavior of the driver did not work properly with Qt5 QtQuick multi touch-point gestures, due to how touch-points are reported when removing a touch-point. My interpretation of the available documentation [1] was that the driver should report all touch-points between SYN_REPORTs, but it is not explicitly stated so. I've found another mail-thread [2] where the creator of the protocol states: "The protocol defines a generic way of sending a variable amount of contacts. The contact count is obtained by counting the number of non-empty finger packets between SYN_REPORT events."-Henrik Rydberg I think this verifies my assumption that all touch-points should be reported between SYN_REPORTs, otherwise it can not be used to obtain the count. [1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt [2] http://lists.x.org/archives/xorg-devel/2010-March/006466.html Signed-off-by: Erik Boto <erik.boto@pelagicore.com> Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> (cherry picked from commit 7cba001c5a502680f6dbf902821726779a9c9287)
* ENGR00271136 Fix build break when CONFIG_CLK_DEBUG is disabledMahesh Mahadevan2013-07-151-2/+2
| | | | | | | | | | | clk structure member name is defined only when CONFIG_CLK_DEBUG is enabled. Hence need to encapsulate the code with this config. Patch received from imx community: https://community.freescale.com/thread/308482 Signed-off-by: xiongweihuang Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
* ARM: 7670/1: fix the memset fixNicolas Pitre2013-07-091-20/+13
| | | | | | | | | | | | | | | | | | | | | Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations") attempted to fix a compliance issue with the memset return value. However the memset itself became broken by that patch for misaligned pointers. This fixes the above by branching over the entry code from the misaligned fixup code to avoid reloading the original pointer. Also, because the function entry alignment is wrong in the Thumb mode compilation, that fixup code is moved to the end. While at it, the entry instructions are slightly reworked to help dual issue pipelines. Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 418df63adac56841ef6b0f1fcf435bc64d4ed177)
* ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) ↵Ivan Djelic2013-07-091-41/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | optimizations Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on assumptions about the implementation of memset and similar functions. The current ARM optimized memset code does not return the value of its first argument, as is usually expected from standard implementations. For instance in the following function: void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter) { memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter)); waiter->magic = waiter; INIT_LIST_HEAD(&waiter->list); } compiled as: 800554d0 <debug_mutex_lock_common>: 800554d0: e92d4008 push {r3, lr} 800554d4: e1a00001 mov r0, r1 800554d8: e3a02010 mov r2, #16 ; 0x10 800554dc: e3a01011 mov r1, #17 ; 0x11 800554e0: eb04426e bl 80165ea0 <memset> 800554e4: e1a03000 mov r3, r0 800554e8: e583000c str r0, [r3, #12] 800554ec: e5830000 str r0, [r3] 800554f0: e5830004 str r0, [r3, #4] 800554f4: e8bd8008 pop {r3, pc} GCC assumes memset returns the value of pointer 'waiter' in register r0; causing register/memory corruptions. This patch fixes the return value of the assembly version of memset. It adds a 'mov' instruction and merges an additional load+store into existing load/store instructions. For ease of review, here is a breakdown of the patch into 4 simple steps: Step 1 ====== Perform the following substitutions: ip -> r8, then r0 -> ip, and insert 'mov ip, r0' as the first statement of the function. At this point, we have a memset() implementation returning the proper result, but corrupting r8 on some paths (the ones that were using ip). Step 2 ====== Make sure r8 is saved and restored when (! CALGN(1)+0) == 1: save r8: - str lr, [sp, #-4]! + stmfd sp!, {r8, lr} and restore r8 on both exit paths: - ldmeqfd sp!, {pc} @ Now <64 bytes to go. + ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go. (...) tst r2, #16 stmneia ip!, {r1, r3, r8, lr} - ldr lr, [sp], #4 + ldmfd sp!, {r8, lr} Step 3 ====== Make sure r8 is saved and restored when (! CALGN(1)+0) == 0: save r8: - stmfd sp!, {r4-r7, lr} + stmfd sp!, {r4-r8, lr} and restore r8 on both exit paths: bgt 3b - ldmeqfd sp!, {r4-r7, pc} + ldmeqfd sp!, {r4-r8, pc} (...) tst r2, #16 stmneia ip!, {r4-r7} - ldmfd sp!, {r4-r7, lr} + ldmfd sp!, {r4-r8, lr} Step 4 ====== Rewrite register list "r4-r7, r8" as "r4-r8". Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com> Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5)
* ENGR00269935 Fix the build breakMahesh Mahadevan2013-07-051-1/+1
| | | | | | Add missing parenthesis Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
* ENGR00269604 Fix the set clock-rate for audio & videoMahesh Mahadevan2013-07-051-1/+2
| | | | | | | | | | | | | | | | | There is single method to set clock-rate for both audio and video pll-s in i.MX6q clock system implementation. That's possible due to they have similar set of registers with a different bases. But there is also one common register: CCM_ANALOG_MISC2, which contains post-dividers. In current implementation, independently of whether audio or video clock is going to be set, the mask 0xc0000000 is applied to MISC2 register. This means, that if the audio clock rate is changed, the video clock post-dividers possibly will be corrupted. This patch fixes the issue described above. Signed-off-by: Alexander Smirnov <alex.bluesman.smirnov@gmail.com> Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
* ENGR00267089 mx6: Amend the definitions of ANADIG_ANA_MISC2_REGx_STEP_TIME_MASKPeter Chan2013-06-201-3/+3
| | | | | | | Correct the definitions of ANADIG_ANA_MISC2_REG0_STEP_TIME_MASK and ANADIG_ANA_MISC2_REG2_STEP_TIME_MASK to 0x03000000 and 0x30000000 respectively Signed-off-by: Peter Chan <B18700@freescale.com>
* ENGR00240112-2 crypto: caam: add ecb(aes) crypto algorithm to caam.Zhang Jiejing2013-06-171-1/+17
| | | | | | | add ecb(aes) support for caam algorithm, the caam H/W support both ecb and cbc, add the algorithm into template. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00240112-1 caam: fix user space crypto API support.Zhang Jiejing2013-06-171-3/+7
| | | | | | | | | | | | This patch fix the CAAM support for Crypto User Space API support. in the dma_map_sg_chained() function, the chained mode will loop until the scatter list end, but when the scatter list end, it will return null and orignal code will set this to the sg list point used by dma_sync, so it will panic. When do chain dma, use a tmp do going through the list. Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00181680-2 No audio when play 3 streams after 3~10 seconds sometimesb022472013-06-171-2/+2
| | | | | | | | | sdma: bd is bufferable dma buffer, interrupt handler can not get correct data after sdma script updated. Which will cause there is no interrupt after failed period number times in the interrupt handler. This is a workaround. Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00181680-1 No audio when play 3 streams after 3~10 seconds sometimesb022472013-06-172-0/+30
| | | | | | | | | sdma: bd is bufferable dma buffer, interrupt handler can not get correct data after sdma script updated. Which will cause there is no interrupt after failed period number times in the interrupt handler. This is a workaround. Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00266312 mx6dl: add i2c4 bus support for sabresd/auto, arm2 platformsFugang Duan2013-06-095-10/+33
| | | | | | | | | | imx6dq have 3 i2c controllers and 5 ecspi,imx6dl have 4 i2c4 controllers and 4 ecspi. imx6dl i2c4 clock source is routed from pll3 through to ecspi_root gate. Add i2c4 bus support for sabresd/auto, and arm2 platforms. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00265061 System hang when running the game lsh.emu.apkguoyin.chen2013-06-031-3/+1
| | | | | | | | The game will creat a lot of hr timer, and make cpu tick broadcast bit not been clear all time. It will cause user space thread not been scheduled. Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
* perf tools: Fix getrusage() related build failure on glibc trunkMarkus Trippelsdorf2013-05-291-0/+1
| | | | | | | | | | | | | | | On a system running glibc trunk perf doesn't build: CC builtin-sched.o builtin-sched.c: In function ‘get_cpu_usage_nsec_parent’: builtin-sched.c:399:16: error: storage size of ‘ru’ isn’t known builtin-sched.c:403:2: error: implicit declaration of function ‘getrusage’ [-Werror=implicit-function-declaration] [...] Fix it by including sys/resource.h. Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20120404084527.GA294@x4 Signed-off-by: Ingo Molnar <mingo@kernel.org>
* ENGR00259693 MX6DL/S-Enable routing of ENET interrupt to GPIORanjani Vaidyanathan2013-04-224-6/+25
| | | | | | | | | | | | In order to fix the performance issue on ENET when WAIT mode is activated, route the ENET interrupts to a GPIO on all MX6DL boards. This patch must be applied on top of: MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active 808863866d2c17aeb3e70a7fcd094bd96db4b601 bae4d40849f3acdd9663f5a0857c9415ed7e6d5d Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00259593 IPU/V4L2 output: Fix video ouput to video16 can not workWayne Zou2013-04-191-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert"ENGR00254931 IPUv3 Fb: Fix display twinkling issue during suspend/resume" This reverts commit 4bd475ba0603e10cdcab7e55f89599f7016cad25. That patch will lead to kernel crash when doing video playback on video16 with overlay on. The reason is that fb driver doesn't reallocate larger DMA buffer requested by V4L2 driver, while IPU hardware write to large DMA address. Other solution is needed for the original issue. kernel BUG at arch/arm/mm/dma-mapping.c:478! Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = 80004000 [00000000] *pgd=00000000 Internal error: Oops: 817 [#1] PREEMPT SMP Modules linked in: mxc_v4l2_capture ipu_csi_enc ipu_prp_enc ipu_fg_overlay_sdc ipu_bg_overlay_sdc ipu_still ov5640_camera_mipi ov5640_camera CPU: 0 Not tainted (3.0.35-2506-g556681e #1) PC is at __bug+0x1c/0x28 LR is at __bug+0x18/0x28 pc : [<800442ac>] lr : [<800442a8>] psr: 20000113 sp : 80a8fe88 ip : c09b2000 fp : 80aa3a70 r10: 80a90080 r9 : 00000040 r8 : bffecec4 r7 : 00000001 r6 : 00000002 r5 : 00000800 r4 : ce5c5e65 r3 : 00000000 r2 : 00000104 r1 : 0bfcf000 r0 : 00000033 Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 4a97404a DAC: 00000015 Process swapper (pid: 0, stack limit = 0x80a8e2f0) Stack: (0x80a8fe88 to 0x80a90000) fe80: 80afde30 8004a464 00000880 ffdfd6b0 bffec000 802fa678 fea0: bffec000 00000060 5e5c5e65 ce5c5e65 bffec250 80ad4c88 bffece4c 00000001 fec0: bffecec4 00000040 0000012c 8c009480 8c009488 80a90080 ffff9527 80423f58 fee0: 00000001 80a8e000 00000096 00000001 80a9004c 80a8e000 00000103 80af77e0 ff00: 00000000 80a90040 00000003 8007a034 00000096 00000000 80a8e000 0000000a ff20: 80a94c4c 80a8e000 80039c00 80a8e000 00000096 00000000 80a8e000 00000000 ff40: 00000000 8007a570 80aa3cc0 80041874 ffffffff f2a00100 00000096 00000002 ff60: 00000001 80040a0c 80af9140 80000093 00000001 00000000 80a8e000 80af1ce4 ff80: 80511044 80aa6e7c 1000406a 412fc09a 00000000 00000000 00000000 80a8ffb0 ffa0: 8004f648 80041b04 40000013 ffffffff 80041ae0 80041d08 00000001 80aa3b3c ffc0: 80af1c40 8002f538 8c005160 80008868 800082f8 00000000 00000000 8002f538 ffe0: 00000000 10c53c7d 80aa3a6c 8002f534 80aa6e74 10008040 00000000 00000000 [<800442ac>] (__bug+0x1c/0x28) from [<8004a464>] (___dma_single_dev_to_cpu+0x84/0x94) [<8004a464>] (___dma_single_dev_to_cpu+0x84/0x94) from [<802fa678>] (fec_rx_poll+0x228/0x2c8) [<802fa678>] (fec_rx_poll+0x228/0x2c8) from [<80423f58>] (net_rx_action+0xb0/0x17c) [<80423f58>] (net_rx_action+0xb0/0x17c) from [<8007a034>] (__do_softirq+0xac/0x140) [<8007a034>] (__do_softirq+0xac/0x140) from [<8007a570>] (irq_exit+0x94/0x9c) [<8007a570>] (irq_exit+0x94/0x9c) from [<80041874>] (handle_IRQ+0x50/0xac) [<80041874>] (handle_IRQ+0x50/0xac) from [<80040a0c>] (__irq_svc+0x4c/0xe8) [<80040a0c>] (__irq_svc+0x4c/0xe8) from [<80041b04>] (default_idle+0x24/0x28) [<80041d08>] (cpu_idle+0xc8/0x108) from [<80008868>] (start_kernel+0x248/0x288) [<80008868>] (start_kernel+0x248/0x288) from [<10008040>] (0x10008040) Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00259008: mlb: reduce iram usage amount in async modeTerry Lv2013-04-161-13/+6
| | | | | | | | | | In testing async mode on mx6q ard and mx6dl ard, driver always said "can not alloc rx buffer". Change async's ring buffer size from 2048 to 1536(MEP package size) and reduce the extra ring buffer for drop package, now the iram usage amount in async mode reduced from 34816 to 24576. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00258885 flexcan: fix errata ERR005641 that MB may fail to be sentDong Aisheng2013-04-161-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an issue from IC errata ERR005641 which is described as follows: ---------------------------------------------------------- FlexCAN does not transmit a message that is enabled to be transmitted in a specific moment during the arbitration process. The following conditions are necessary to have the issue. - Only one MB is configured to be transmitted - The write which enables the MB to be transmitted (write on Control status word) happens during a specific clock during the arbitration process. After this arbitration process occurs, the bus goes to Idle state and no new message is received on bus. For example: 1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control Status word) - First write on CODE 2) Reconfigure the ID and data fields 3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code field) - Second write on code 4) CAN bus keeps in Idle state 5) No write on Control status from any MB happens. During the second write on code (step 3), the write must happen one clock before the current MB13 is to be scanned by arbitration process. In this case, it does not detect the new code (0xC) and no new arbitration is scheduled. The suggested workaround which is implemented in this patch is: The workaround consists of executing two extra steps: 6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000). If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter. 7. Write twice INACTIVE code (0b1000) into the first valid mailbox. Note: The first mailbox cannot be used for reception or transmission process. ------------------------------------------------------------- Note: Although the currently flexcan driver does not have the step 1 to run, it's also possible to meet this issue in theory because we can not predict when the arbitration is scheduled. With a modified can-utils/canfdttest tool simulating Pingpong test, we were able to reproduce this issue after running a about one day. After applying this patch, we ran six days and did not see the issue happen again on two mx6q sabrelite boards. Signed-off-by: Dong Aisheng <b29396@freescale.com>
* can: flexcan: Fix CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACKReuben Dowle2013-04-161-10/+7
| | | | | | | | | | | | | | | | | | Currently the flexcan driver uses hardware local echo. This blindly echos all transmitted frames to all receiving sockets, regardless what CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACK are set to. This patch now submits transmitted frames to be echoed in the transmit complete interrupt, preserving the reference to the sending socket. This allows the can protocol to correctly handle the local echo. Further this patch moves tx_bytes statistic accounting into the tx_complete handler. Signed-off-by: Reuben Dowle <reuben.dowle@navico.com> [mkl: move tx_bytes accounting into tx_complete handler; cleanups] Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
* can: dev: let can_get_echo_skb() return dlc of CAN frameMarc Kleine-Budde2013-04-162-2/+10
| | | | | | | | can_get_echo_skb() is usually called in the TX complete handler. The stats->tx_packets and stats->tx_bytes should be updated there, too. This patch simplifies to figure out the size of the sent CAN frame. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
* ENGR00258733 WEIM-NOR: mtd: cfi_cmdset_0002: Do not release the mutex lockHuang Shijie2013-04-151-4/+0
| | | | | | | | | The NOR may suffers a write-buffer timeout during the bonnie++/ubifs stress test. This patch is just a workaround to fix this issue. With this patch, the read/write/erase will do in the synchronous way. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00258357-5: mlb: Use circle buf macros to replace old ringbuf mechanismTerry Lv2013-04-152-207/+371
| | | | | | | | | | | | | | | Use circle buf to replace old ringbuf mechanism. Change to use circle buffer in read, write, rx isr and tx isr functions. In first design of MLB, it's using it's own mechanism to manage ring buffer, like in mxc_mlb.c. And then, I saw that kernel already had a serials of circ buffer macros which can be used to manage ring buffers. This patch is to use circle buffer macros to manage mlb internal ring buffers. For detail of circle buffers, you can refer to linux-2.6-imx/Documentation/circular-buffers.txt. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00258357-4: mlb: Group static variables to structure mlb_dataTerry Lv2013-04-151-433/+536
| | | | | | | | | Group static variables to structure mlb_data. Use mlb_data as platform data to be passed to file operation functions. Change accordingly functions for this change. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00258357-3: mlb: Reset whole CDR in init functionTerry Lv2013-04-151-46/+145
| | | | | | | | | | | | | Reset whole CDR in init function. This will make mlb connection to MITB more stable. This is a missed part in mx6 rm's mlb section, but new in mlb's latest spec DS62420AP2.pdf 12.1.1-1. Without this patch, mlb may receive irq from MITB during initialization. It might cause some connection issue that mlb can't receive data sometimes. It was treat to be MITB's fault before we get the latest spec. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00258357-2: mlb: Add more debug msgs in DEBUG modeTerry Lv2013-04-151-124/+87
| | | | | | | | Changes are: 1. Use print_hex_dump to print buffer in DEBUG mode. 2. Add more debug msgs. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00258357-1: mlb: Remove MLB150_ from macro define namesTerry Lv2013-04-151-354/+354
| | | | | | Remove MLB150_ from macro define names to make code clean. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00257847-2 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is activeRanjani Vaidyanathan2013-04-122-0/+20
| | | | | | | | | | | | | | | | | | All of the interrupts from the ENET block are not routed to the GPC block. Hence ENET interrupts are not able to wake up the SOC when the system is in WAIT mode. And the ENET interrupt gets serviced only when another interrupt causes the SOC to exit WAIT mode. This impacts the ENET performance. To fix the issue two options: 1. Route the ENET interrupt to a GPIO. Need to enable the CONFIG_MX6_ENET_IRQ_TO_GPIO in the config. 2. If the GPIO mechanism cannot be used and is not enabled by the above mentioned config, the patch will disable entry to WAIT mode until ENET clock is active. When the ENET clock is disabled, WAIT mode will be automatically enetered. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00257847-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is activeRanjani Vaidyanathan2013-04-1212-30/+154
| | | | | | | | | | | | | | | | | | | | | | | All of the interrupts from the ENET block are not routed to the GPC block. Hence ENET interrupts are not able to wake up the SOC when the system is in WAIT mode. And the ENET interrupt gets serviced only when another interrupt causes the SOC to exit WAIT mode. This impacts the ENET performance. To fix the issue two options: 1. Route the ENET interrupt to a GPIO. Need to enable the CONFIG_MX6_ENET_IRQ_TO_GPIO in the config. This patch provides support for routing the ENET interrupt to GPIO_1_6. Routing to this GPIO requires no HW board mods. If the GPIO_1_6 is being used for some other peripheral, this patch can be followed to route the ENET interrupt to any other GPIO though a HW mode maybe required. 2. If the GPIO mechanism cannot be used and is not enabled by the above mentioned config, the patch will disable entry to WAIT mode until ENET clock is active. When the ENET clock is disabled, WAIT mode will be automatically enetered. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00256417: MLB: can't receive data in wait modeTerry Lv2013-04-121-1/+6
| | | | | | | | For MLB uses iram for data transfer, and there's a missing of dependency on iram in MLB's clock setting, MLB can't receive data in wait mode. We need to add ocram clock dependency in MLB clock. Signed-off-by: Terry Lv <r65388@freescale.com>
* mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.cHarald Nordgard-Hansen2013-04-111-2/+14
| | | | | | | | | | | | | | | | | | | | | | When working on a problem with some flash chips that lock up during write-buffer operations, I think there may be a bug in the linux handling of chips using cfi_cmdset_0002.c. The datasheets I have found for a number of these chips all specify that when aborting a write-buffer command, it is not enough to use the standard reset. Rather a "write-to-buffer-reset command" is needed. This command is quite similar for all chips, the main variance seem to be if the final 0xF0 can go to any address or must go to addr_unlock1. The bug is then in the recovery handling when timing out at the end of do_write_buffer, where using the normal reset command is not sufficient. Without this change, if the write-buffer command fails then any following operations on the flash also fail. Signed-off-by: Harald Nordgard-Hansen <hhansen@pvv.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* mtd: cfi_cmdset_0002: Micron M29EW bugfixes as per TN-13-07Gerlando Falauto2013-04-111-0/+67
| | | | | | | | | | | | Fix the following issues with Micron's (formerly Numonyx) M29EW NOR flash chips, as documented on TN-13-07: - Correcting Erase Suspend Hang Ups (page 20) - Resolving the Delay After Resume Issue (page 22) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* mtd: cfi_cmdset_0002: Slight cleanup of fixup messagesDavid Woodhouse2013-04-111-3/+3
| | | | | | | These should be semicolons, not commas. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* mtd: add fixup for S29NS512P NOR flash.Javier Martin2013-04-111-0/+14
| | | | | | | | | | | | | Spansion S29NS512P flash uses a 16bit transfer to report number of sectors instead of two 8bit accesses as CFI specifies. Artem: remove warning message which said that we are applying the fixup - no need to scary the user unnecessarily. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
* mtd: chips: cfi_cmdset_0002: Match ENABLE_VPP()/DISABLE_VPP() callsPaul Parsons2013-04-111-2/+4
| | | | | | | | | | | | This patch is part of a set which fixes unnecessary flash erase and write errors resulting from the MTD CFI driver turning off vpp while an erase is in progress. This patch ensures that only those flash operations which call ENABLE_VPP() can then call DISABLE_VPP(). Other operations should never call DISABLE_VPP(). Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
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