diff options
| author | Stephen Hemminger <shemminger@linux-foundation.org> | 2007-11-28 14:25:05 -0800 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-12-01 16:32:30 -0500 |
| commit | 1a8098be987d3fa00c9fe9d2b68154675df49112 (patch) | |
| tree | 3e28b7e5d2de30da8c7be5f75374a364a63b9cec /drivers | |
| parent | 44c7fccec4098772b9451a252d162faea4f0cc34 (diff) | |
| download | linux-1a8098be987d3fa00c9fe9d2b68154675df49112.tar.gz | |
skge: MTU changing fix
The code to change MTU doesn't correctly handle all the chip variations
and requirements for restarting. On Genesis chips changing MTU would just
cause receiver to hang.
Use a simpler approach of just taking link down/up if needed.
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/skge.c | 35 |
1 files changed, 2 insertions, 33 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 53d2059a6604..186eb8ebfda6 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c @@ -2896,11 +2896,7 @@ static void skge_tx_timeout(struct net_device *dev) static int skge_change_mtu(struct net_device *dev, int new_mtu) { - struct skge_port *skge = netdev_priv(dev); - struct skge_hw *hw = skge->hw; - int port = skge->port; int err; - u16 ctl, reg; if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) return -EINVAL; @@ -2910,40 +2906,13 @@ static int skge_change_mtu(struct net_device *dev, int new_mtu) return 0; } - skge_write32(hw, B0_IMSK, 0); - dev->trans_start = jiffies; /* prevent tx timeout */ - netif_stop_queue(dev); - napi_disable(&skge->napi); - - ctl = gma_read16(hw, port, GM_GP_CTRL); - gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); - - skge_rx_clean(skge); - skge_rx_stop(hw, port); + skge_down(dev); dev->mtu = new_mtu; - reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); - if (new_mtu > 1500) - reg |= GM_SMOD_JUMBO_ENA; - gma_write16(hw, port, GM_SERIAL_MODE, reg); - - skge_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); - - err = skge_rx_fill(dev); - wmb(); - if (!err) - skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); - skge_write32(hw, B0_IMSK, hw->intr_mask); - + err = skge_up(dev); if (err) dev_close(dev); - else { - gma_write16(hw, port, GM_GP_CTRL, ctl); - - napi_enable(&skge->napi); - netif_wake_queue(dev); - } return err; } |