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| author | Tuomas Tynkkynen <ttynkkynen@nvidia.com> | 2014-08-21 00:04:36 +0300 |
|---|---|---|
| committer | Paul Sherwood <paul.sherwood@codethink.co.uk> | 2014-12-06 22:44:51 +0000 |
| commit | c971fa210693ec61df286a3fee3c5247c8fd5dc9 (patch) | |
| tree | 70874a6508056372783ed3fcd5be54cf2528069c /arch/arm/boot/dts/tegra124.dtsi | |
| parent | c46f236de634b0d5b8d108d705183abb8fb93971 (diff) | |
| download | linux-c971fa210693ec61df286a3fee3c5247c8fd5dc9.tar.gz | |
clk: tegra: Add the DFLL as a possible parent of the cclk_g clock
The DFLL clocksource was missing from the list of possible parents for
the fast CPU cluster. Add it to the list.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
0 files changed, 0 insertions, 0 deletions