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| author | Tuomas Tynkkynen <ttynkkynen@nvidia.com> | 2014-08-21 00:04:42 +0300 |
|---|---|---|
| committer | Paul Sherwood <paul.sherwood@codethink.co.uk> | 2014-12-06 22:44:53 +0000 |
| commit | afb5dfb1ce70cf9c896089128c471c892c0b8a62 (patch) | |
| tree | 32ca1552d164f1736df07171fd44956a89684756 | |
| parent | 9fade5978786eb141ec51989b57d8a6f51668a12 (diff) | |
| download | linux-afb5dfb1ce70cf9c896089128c471c892c0b8a62.tar.gz | |
ARM: tegra: Add entries for cpufreq on Tegra124
The Tegra124 cpufreq driver relies on certain clocks being present
in the /cpus/cpu@0 node.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 38300e9b9664..17696cb0ead9 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -882,6 +882,15 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; + + clocks = <&tegra_car TEGRA124_CLK_CCLK_G>, + <&tegra_car TEGRA124_CLK_CCLK_LP>, + <&tegra_car TEGRA124_CLK_PLL_X>, + <&tegra_car TEGRA124_CLK_PLL_P>, + <&dfll>; + clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll"; + /* FIXME: what's the actual transition time? */ + clock-latency = <300000>; }; cpu@1 { |