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| author | Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> | 2013-07-05 15:34:11 -0500 |
|---|---|---|
| committer | Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com> | 2013-07-05 15:41:58 -0500 |
| commit | 36947b7fbbf84e5bb7c98baed3af2a683e828b94 (patch) | |
| tree | 1492bb609140809944a086d4ee885d7b2f0632e5 | |
| parent | e27b532fd1a0409547e52bdc397c80eb9a8159b2 (diff) | |
| download | linux-36947b7fbbf84e5bb7c98baed3af2a683e828b94.tar.gz | |
ENGR00269935 Fix the build break
Add missing parenthesis
Signed-off-by: Mahesh Mahadevan <Mahesh.Mahadevan@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index 6269daaf6616..e1912d126932 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -1024,7 +1024,7 @@ static int _clk_audio_video_set_rate(struct clk *clk, unsigned long rate) __raw_writel(mfn, pllbase + PLL_NUM_DIV_OFFSET); __raw_writel(mfd, pllbase + PLL_DENOM_DIV_OFFSET); - if (rev >= IMX_CHIP_REVISION_1_1) && + if ((rev >= IMX_CHIP_REVISION_1_1) && (pllbase == PLL5_VIDEO_BASE_ADDR)) { reg = __raw_readl(ANA_MISC2_BASE_ADDR) & ~ANADIG_ANA_MISC2_CONTROL3_MASK; |