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| author | Tapani <tapani@vmail.me> | 2013-05-10 15:52:29 +0800 |
|---|---|---|
| committer | John Weber <rjohnweber@gmail.com> | 2013-07-28 23:45:51 -0500 |
| commit | 022f696a4d5b462916b76b68dc9e95406a36205c (patch) | |
| tree | 202f42a314dcd27c51fe70d2f021e671e747a905 | |
| parent | 4ce987a0b12eebadc87b88f036ffe09af3f058c4 (diff) | |
| download | linux-022f696a4d5b462916b76b68dc9e95406a36205c.tar.gz | |
Don't touch iMX6 SATA clock on other than iMX6Q.
The IOMUXC_GPR13 control register has different functionality on iMX6S/iMX6DL
(cherry picked from commit 2a118bb2c07da80ad8906387d75c0b083ec9e619)
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index e1912d126932..3b76c5379d3e 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5618,8 +5618,10 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, base = ioremap(MX6Q_IOMUXC_BASE_ADDR, SZ_4K); /* Close PLL inside SATA PHY. */ - reg = __raw_readl(base + 0x34); - __raw_writel(reg | (1 << 1), base + 0x34); + if (cpu_is_mx6q()) { + reg = __raw_readl(base + 0x34); + __raw_writel(reg | (1 << 1), base + 0x34); + } /* Close PCIE PHY. */ reg = __raw_readl(base + 0x04); |