summaryrefslogtreecommitdiff
path: root/arch/arm/mach-aspeed/include/mach/ast1070_irqs.h
blob: 0774417b09569ddac64230e98a18aac257e02f10 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
/*
 *  arch/arm/plat-aspeed/include/plat/irqs.h
 *
 *  Copyright (C) 2012-2020  ASPEED Technology Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#ifndef _AST1070_IRQS_H_
#define _AST1070_IRQS_H_                 1

#define IRQ_C0_VIC_CHAIN					IRQ_EXT0
#define IRQ_C0_VIC_CHAIN_START			(AST_VIC_NUM)

#define IRQ_C1_VIC_CHAIN					IRQ_EXT1
#define IRQ_C1_VIC_CHAIN_START			(IRQ_C0_VIC_CHAIN_START + AST_CVIC_NUM)

#define IRQ_C2_VIC_CHAIN					IRQ_EXT2
#define IRQ_C2_VIC_CHAIN_START			(IRQ_C1_VIC_CHAIN_START + AST_CVIC_NUM)

#define IRQ_C3_VIC_CHAIN					IRQ_EXT3
#define IRQ_C3_VIC_CHAIN_START			(IRQ_C2_VIC_CHAIN_START + AST_CVIC_NUM)

#define AST_CVIC_NUM 					25

#define IRQ_C0_N1_KCS                     (IRQ_C0_VIC_CHAIN_START + 0)
#define IRQ_C0_N1_UART                    (IRQ_C0_VIC_CHAIN_START + 1)
#define IRQ_C0_N1_MAILBOX                 (IRQ_C0_VIC_CHAIN_START + 2)
#define IRQ_C0_N1_PORT80                  (IRQ_C0_VIC_CHAIN_START + 3)
#define IRQ_C0_N1_RESET                   (IRQ_C0_VIC_CHAIN_START + 4)
#define IRQ_C0_N2_KCS                     (IRQ_C0_VIC_CHAIN_START + 5)
#define IRQ_C0_N2_UART                    (IRQ_C0_VIC_CHAIN_START + 6)
#define IRQ_C0_N2_MAILBOX                 (IRQ_C0_VIC_CHAIN_START + 7)
#define IRQ_C0_N2_PORT80                  (IRQ_C0_VIC_CHAIN_START + 8)
#define IRQ_C0_N2_RESET                   (IRQ_C0_VIC_CHAIN_START + 9)
#define IRQ_C0_N3_KCS                     (IRQ_C0_VIC_CHAIN_START + 10)
#define IRQ_C0_N3_UART                    (IRQ_C0_VIC_CHAIN_START + 11)
#define IRQ_C0_N3_MAILBOX                 (IRQ_C0_VIC_CHAIN_START + 12)
#define IRQ_C0_N3_PORT80                  (IRQ_C0_VIC_CHAIN_START + 13)
#define IRQ_C0_N3_RESET                   (IRQ_C0_VIC_CHAIN_START + 14)
#define IRQ_C0_N4_KCS                     (IRQ_C0_VIC_CHAIN_START + 15)
#define IRQ_C0_N4_UART                    (IRQ_C0_VIC_CHAIN_START + 16)
#define IRQ_C0_N4_MAILBOX                 (IRQ_C0_VIC_CHAIN_START + 17)
#define IRQ_C0_N4_PORT80                  (IRQ_C0_VIC_CHAIN_START + 18)
#define IRQ_C0_N4_RESET                   (IRQ_C0_VIC_CHAIN_START + 19)
#define IRQ_C0_N1_UART_DMA                (IRQ_C0_VIC_CHAIN_START + 20)
#define IRQ_C0_N2_UART_DMA                (IRQ_C0_VIC_CHAIN_START + 21)
#define IRQ_C0_N3_UART_DMA                (IRQ_C0_VIC_CHAIN_START + 22)
#define IRQ_C0_N4_UART_DMA                (IRQ_C0_VIC_CHAIN_START + 23)
#define IRQ_C0_I2C						(IRQ_C0_VIC_CHAIN_START + 24)

#define IRQ_C1_N1_KCS                     (IRQ_C1_VIC_CHAIN_START + 0)
#define IRQ_C1_N1_UART                    (IRQ_C1_VIC_CHAIN_START + 1)
#define IRQ_C1_N1_MAILBOX                 (IRQ_C1_VIC_CHAIN_START + 2)
#define IRQ_C1_N1_PORT80                  (IRQ_C1_VIC_CHAIN_START + 3)
#define IRQ_C1_N1_RESET                   (IRQ_C1_VIC_CHAIN_START + 4)
#define IRQ_C1_N2_KCS                     (IRQ_C1_VIC_CHAIN_START + 5)
#define IRQ_C1_N2_UART                    (IRQ_C1_VIC_CHAIN_START + 6)
#define IRQ_C1_N2_MAILBOX                 (IRQ_C1_VIC_CHAIN_START + 7)
#define IRQ_C1_N2_PORT80                  (IRQ_C1_VIC_CHAIN_START + 8)
#define IRQ_C1_N2_RESET                   (IRQ_C1_VIC_CHAIN_START + 9)
#define IRQ_C1_N3_KCS                     (IRQ_C1_VIC_CHAIN_START + 10)
#define IRQ_C1_N3_UART                    (IRQ_C1_VIC_CHAIN_START + 11)
#define IRQ_C1_N3_MAILBOX                 (IRQ_C1_VIC_CHAIN_START + 12)
#define IRQ_C1_N3_PORT80                  (IRQ_C1_VIC_CHAIN_START + 13)
#define IRQ_C1_N3_RESET                   (IRQ_C1_VIC_CHAIN_START + 14)
#define IRQ_C1_N4_KCS                     (IRQ_C1_VIC_CHAIN_START + 15)
#define IRQ_C1_N4_UART                    (IRQ_C1_VIC_CHAIN_START + 16)
#define IRQ_C1_N4_MAILBOX                 (IRQ_C1_VIC_CHAIN_START + 17)
#define IRQ_C1_N4_PORT80                  (IRQ_C1_VIC_CHAIN_START + 18)
#define IRQ_C1_N4_RESET                   (IRQ_C1_VIC_CHAIN_START + 19)
#define IRQ_C1_N1_UART_DMA                (IRQ_C1_VIC_CHAIN_START + 20)
#define IRQ_C1_N2_UART_DMA                (IRQ_C1_VIC_CHAIN_START + 21)
#define IRQ_C1_N3_UART_DMA                (IRQ_C1_VIC_CHAIN_START + 22)
#define IRQ_C1_N4_UART_DMA                (IRQ_C1_VIC_CHAIN_START + 23)
#define IRQ_C1_I2C						(IRQ_C1_VIC_CHAIN_START + 24)

#define IRQ_C2_N1_KCS                     (IRQ_C2_VIC_CHAIN_START + 0)
#define IRQ_C2_N1_UART                    (IRQ_C2_VIC_CHAIN_START + 1)
#define IRQ_C2_N1_MAILBOX                 (IRQ_C2_VIC_CHAIN_START + 2)
#define IRQ_C2_N1_PORT80                  (IRQ_C2_VIC_CHAIN_START + 3)
#define IRQ_C2_N1_RESET                   (IRQ_C2_VIC_CHAIN_START + 4)
#define IRQ_C2_N2_KCS                     (IRQ_C2_VIC_CHAIN_START + 5)
#define IRQ_C2_N2_UART                    (IRQ_C2_VIC_CHAIN_START + 6)
#define IRQ_C2_N2_MAILBOX                 (IRQ_C2_VIC_CHAIN_START + 7)
#define IRQ_C2_N2_PORT80                  (IRQ_C2_VIC_CHAIN_START + 8)
#define IRQ_C2_N2_RESET                   (IRQ_C2_VIC_CHAIN_START + 9)
#define IRQ_C2_N3_KCS                     (IRQ_C2_VIC_CHAIN_START + 10)
#define IRQ_C2_N3_UART                    (IRQ_C2_VIC_CHAIN_START + 11)
#define IRQ_C2_N3_MAILBOX                 (IRQ_C2_VIC_CHAIN_START + 12)
#define IRQ_C2_N3_PORT80                  (IRQ_C2_VIC_CHAIN_START + 13)
#define IRQ_C2_N3_RESET                   (IRQ_C2_VIC_CHAIN_START + 14)
#define IRQ_C2_N4_KCS                     (IRQ_C2_VIC_CHAIN_START + 15)
#define IRQ_C2_N4_UART                    (IRQ_C2_VIC_CHAIN_START + 16)
#define IRQ_C2_N4_MAILBOX                 (IRQ_C2_VIC_CHAIN_START + 17)
#define IRQ_C2_N4_PORT80                  (IRQ_C2_VIC_CHAIN_START + 18)
#define IRQ_C2_N4_RESET                   (IRQ_C2_VIC_CHAIN_START + 19)
#define IRQ_C2_N1_UART_DMA                (IRQ_C2_VIC_CHAIN_START + 20)
#define IRQ_C2_N2_UART_DMA                (IRQ_C2_VIC_CHAIN_START + 21)
#define IRQ_C2_N3_UART_DMA                (IRQ_C2_VIC_CHAIN_START + 22)
#define IRQ_C2_N4_UART_DMA                (IRQ_C2_VIC_CHAIN_START + 23)
#define IRQ_C2_I2C						(IRQ_C2_VIC_CHAIN_START + 24)

#define IRQ_C3_N1_KCS                     (IRQ_C3_VIC_CHAIN_START + 0)
#define IRQ_C3_N1_UART                    (IRQ_C3_VIC_CHAIN_START + 1)
#define IRQ_C3_N1_MAILBOX                 (IRQ_C3_VIC_CHAIN_START + 2)
#define IRQ_C3_N1_PORT80                  (IRQ_C3_VIC_CHAIN_START + 3)
#define IRQ_C3_N1_RESET                   (IRQ_C3_VIC_CHAIN_START + 4)
#define IRQ_C3_N2_KCS                     (IRQ_C3_VIC_CHAIN_START + 5)
#define IRQ_C3_N2_UART                    (IRQ_C3_VIC_CHAIN_START + 6)
#define IRQ_C3_N2_MAILBOX                 (IRQ_C3_VIC_CHAIN_START + 7)
#define IRQ_C3_N2_PORT80                  (IRQ_C3_VIC_CHAIN_START + 8)
#define IRQ_C3_N2_RESET                   (IRQ_C3_VIC_CHAIN_START + 9)
#define IRQ_C3_N3_KCS                     (IRQ_C3_VIC_CHAIN_START + 10)
#define IRQ_C3_N3_UART                    (IRQ_C3_VIC_CHAIN_START + 11)
#define IRQ_C3_N3_MAILBOX                 (IRQ_C3_VIC_CHAIN_START + 12)
#define IRQ_C3_N3_PORT80                  (IRQ_C3_VIC_CHAIN_START + 13)
#define IRQ_C3_N3_RESET                   (IRQ_C3_VIC_CHAIN_START + 14)
#define IRQ_C3_N4_KCS                     (IRQ_C3_VIC_CHAIN_START + 15)
#define IRQ_C3_N4_UART                    (IRQ_C3_VIC_CHAIN_START + 16)
#define IRQ_C3_N4_MAILBOX                 (IRQ_C3_VIC_CHAIN_START + 17)
#define IRQ_C3_N4_PORT80                  (IRQ_C3_VIC_CHAIN_START + 18)
#define IRQ_C3_N4_RESET                   (IRQ_C3_VIC_CHAIN_START + 19)
#define IRQ_C3_N1_UART_DMA                (IRQ_C3_VIC_CHAIN_START + 20)
#define IRQ_C3_N2_UART_DMA                (IRQ_C3_VIC_CHAIN_START + 21)
#define IRQ_C3_N3_UART_DMA                (IRQ_C3_VIC_CHAIN_START + 22)
#define IRQ_C3_N4_UART_DMA                (IRQ_C3_VIC_CHAIN_START + 23)
#define IRQ_C3_I2C						(IRQ_C3_VIC_CHAIN_START + 24)

#endif