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/*
* Copyright 2000-2011 Intel Corporation All Rights Reserved
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* This file was originally licensed under the following license
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
// 87 // Total instruction count
// 1 // Total kernel count
.kernel PA_DI_422CP
.code
// FileName: DI.asm
// Author: Vivek Kumar
// Description: Tasks for DI only case (16x4 block)
// Module name: common.inc
//
// Common header file for all Video-Processing kernels
//
.default_execution_size (16)
.default_register_type :ub
.reg_count_total 128
.reg_count_payload 7
//========== Common constants ==========
//========== Macros ==========
//Fast Jump, For more details see "Set_Layer_N.asm"
//========== Defines ====================
//========== Static Parameters (Common To All) ==========
//r1
//r2
// e.g. byte0 byte1 byte2
// YUYV 0 1 3
// YVYU 0 3 1
//Color Pipe (IECP) parameters
//ByteCopy
//r4
// e.g. byte0 byte1 byte2
// YUYV 0 1 3
// YVYU 0 3 1
//========== Inline parameters (Common To All) ===========
//============== Binding Index Table===========
//Common between DNDI and DNUV
//================= Common Message Descriptor =====
// Message descriptor for thread spawning
// Message Descriptors
// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later)
// 0000,0000,0000
// 0001(Spawn a root thread),0001 (Root thread spawn thread)
// = 0x02000011
// Thread Spawner Message Descriptor
// Message descriptor for atomic operation add
// Message Descriptors
// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later)
// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add)
// 0000,0000 (Binding table index, added later)
// = 0x02000011
// Atomic Operation Add Message Descriptor
// Message descriptor for dataport media write
// Message Descriptors
// = 000 0001 (min message len 1 - add later) 00000 (resp len 0)
// 1 (header present 1) 0 1010 (media block write) 000000
// 00000000 (binding table index - set later)
// = 0x020A8000
// Message Length defines
// Response Length defines
// Block Width and Height Size defines
// Extended Message Descriptors
// Common message descriptors:
//===================== Math Function Control ===================================
//============ Message Registers ===============
// buf4 starts from r28
//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT
.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub
.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw
.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud
.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f
//=================== End of thread instruction ===========================
//=====================Pointers Used=====================================
//=======================================================================
//r11-r17
// Define temp space for any usages
// Common Buffers
// temp space for rotation
.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
// End of common.inc
// FileName: DNDI.inc
// Author: Vivek Kumar
// Description: Include file for DN, DI and DNDI
// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED
// End of common.inc
//Interface:
//Static Parameters:
//r1
//====================== Binding table (Explicit To DNDI)=========================================
.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud
.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d
.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w
.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud
.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud
.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud
.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw
.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub
.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud
.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d
.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub
.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud
.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d
.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud
.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud
.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud
.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub
.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud
.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub
//r45
//Use r45 as message header, so no need to "mov" the data.
.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5
.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
// Message response (UV Copy); Use buffer 5
.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
//Temp GRFs: For 42X to 422 Conversion
.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs
.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs
//---------------------------------------------------------------------------
// Message descriptors
//---------------------------------------------------------------------------
// Extended message descriptor
// Message descriptor for sampler read
// = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11)
// 1 (header present 1) 0 11 (SIMD32/64 mode)
// 1000 (message type) 0000 (DI state index)
// 00000000 (binding table index - set later)
// = 0x040b8000
// Attention: The Message Length is The Number of GRFs with Data Only, without the Header
//---------------------------------------------------------------------------
// VDI Return Data format
//---------------------------------------------------------------------------
// Defines for DI enabled
// Defines for DI disabled
// FileName: DNDI_Command.asm
// Author: Vivek Kumar
// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block
// Prepare the DNDI send command
mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header
mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK
mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK
send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud
// On Gen6, with VDI walker, use the XY pair returned rather than programmed above
// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled
mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15
// FileName: DI_STMM_Save.asm
// Author: Vivek Kumar
// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block)
// Write STMM to memory
mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header
mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF
shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2
mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin
mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4)
send (8) null<1>:d r20 0x5 0x40A8021:ud
// FileName: DNDI_Enc_Stats_Save.asm
// Author: Vivek Kumar
// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block)
// Write encoder statistics to memory
//Currently enable this only on Gen6 validation
mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF
mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header
shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2
mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3
shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4
mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3)
add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin
//Data block for Encoder Statistics
//----------------------------------------------------
//| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes
//----------------------------------------------------
//| BNE | MCNT | FCNT | TCNT | X | X | X | X |
//----------------------------------------------------
//| DcTpT | SVCM | DcBpT | DcTpB |
//----------------------------------------------------
//| SHCM | STAD | DcTcB | DcBpB |
//----------------------------------------------------
mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF
mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF
mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF
send (8) null<1>:d r24 0x5 0x40A8021:ud
// FileName: DI_Save_422CP_16x4.asm
// Author: Vivek Kumar
// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP)
.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub
.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub
.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub
.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub
mov (8) r27.0<1>:ud r0.0<8;8,1>:ud
shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled
mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin
mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8)
//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer
//Compose area-of-interest bit + color pipe state pointer
or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk }
//prepare the message headers
mov (8) r18.0<1>:ud r27<8;8,1>:ud
mov (8) r24.0<1>:ud r27<8;8,1>:ud
// Pack 2nd field Y; First 8x4 block
mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
// Pack 2nd field U, V; First 8x4 block
mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
// Pack 2nd field Y; Second 8x4 block
mov (8) r21.0<1>:ud r18.0<8;8,1>:ud
add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w
mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
// Pack 2nd field U, V; Second 8x4 block
mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
send (8) null<1>:d r18.0 0x5 0x60A801B:ud
send (8) null<1>:d r21.0 0x5 0x60A801B:ud
// Pack 1st field Y; 1st 8x4 block
mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
// Pack 1st field U,V; 1st 8x4 block
mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
// Pack 1st field Y; 2nd 8x4 block
mov (8) r27.0<1>:ud r24.0<8;8,1>:ud
add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w
mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization
mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization
// Pack 1st field U, V; 2nd 8x4 block
mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization
send (8) null<1>:d r24.0 0x5 0x60A801E:ud
send (8) null<1>:d r27.0 0x5 0x60A801E:ud
//End of Thread message
mov (8) r127<1>:ud r0.0<8;8,1>:ud
send (1) null<1>:d r127 0x27 0x02000010
.end_code
.end_kernel
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