2011-01-07 Ivan Maidanski <ivmai@mail.ru>libatomic_ops-7_2alpha5-20110107

	* src/.cvsignore: Add more auto-generated files.
	* tests/.cvsignore: Ditto.
	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full, AO_store,
	AO_compare_double_and_swap_double): Reformat code.
	* src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full,
	AO_compare_double_and_swap_double): Ditto.
	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_and_swap):
	Produce "it eq" instruction only for Thumb mode.
	* src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Ditto.

5 files changed, 64 insertions, 42 deletions

diff --git a/ChangeLog b/ChangeLog
index 625231c..cc0e795 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,15 @@
+2011-01-07  Ivan Maidanski  <ivmai@mail.ru>
+
+	* src/.cvsignore: Add more auto-generated files.
+	* tests/.cvsignore: Ditto.
+	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full, AO_store,
+	AO_compare_double_and_swap_double): Reformat code.
+	* src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full,
+	AO_compare_double_and_swap_double): Ditto.
+	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_and_swap):
+	Produce "it eq" instruction only for Thumb mode.
+	* src/atomic_ops/sysdeps/gcc/arm.h (AO_compare_and_swap): Ditto.
+
 2010-11-23  Ivan Maidanski <ivmai@mail.ru> (really Michael Hope)
 
 	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_compare_and_swap):
diff --git a/src/.cvsignore b/src/.cvsignore
index 190bde5..655e9cf 100644
--- a/src/.cvsignore
+++ b/src/.cvsignore
@@ -1,3 +1,6 @@
+*.a
+*.o
 Makefile
 config.h
+config.h.in~
 stamp-h1
diff --git a/src/atomic_ops/sysdeps/armcc/arm_v6.h b/src/atomic_ops/sysdeps/armcc/arm_v6.h
index bedbbc9..33c22ca 100644
--- a/src/atomic_ops/sysdeps/armcc/arm_v6.h
+++ b/src/atomic_ops/sysdeps/armcc/arm_v6.h
@@ -43,14 +43,15 @@ Dont use with ARM instruction sets lower than v6
 AO_INLINE void
 AO_nop_full(void)
 {
-#ifndef AO_UNIPROCESSOR
+# ifndef AO_UNIPROCESSOR
         unsigned int dest=0;
         /* issue an data memory barrier (keeps ordering of memory transactions  */
         /* before and after this operation)                                             */
-        __asm { mcr p15,0,dest,c7,c10,5 } ;
-#endif
+        __asm {
+                mcr p15,0,dest,c7,c10,5
+                };
+# endif
 }
-
 #define AO_HAVE_nop_full
 
 AO_INLINE AO_t
@@ -76,11 +77,11 @@ AO_INLINE void AO_store(volatile AO_t *addr, AO_t value)
 
 retry:
 __asm {
-                ldrex   tmp, [addr]
-                strex   tmp, value, [addr]
-                teq     tmp, #0
-                bne     retry
-          };
+        ldrex   tmp, [addr]
+        strex   tmp, value, [addr]
+        teq     tmp, #0
+        bne     retry
+        };
 }
 #define AO_HAVE_store
 
@@ -103,15 +104,14 @@ AO_test_and_set(volatile AO_TS_t *addr) {
         unsigned long one = 1;
 retry:
 __asm {
-                ldrex   oldval, [addr]
-                strex   tmp, one, [addr]
-                teq             tmp, #0
-                bne     retry
-          }
+        ldrex   oldval, [addr]
+        strex   tmp, one, [addr]
+        teq     tmp, #0
+        bne     retry
+        }
 
         return oldval;
 }
-
 #define AO_HAVE_test_and_set
 
 /* NEC LE-IT: fetch and add for ARMv6 */
@@ -127,11 +127,11 @@ __asm {
         add     tmp, incr, result
         strex   tmp2, tmp, [p]
         teq     tmp2, #0
-        bne     retry }
+        bne     retry
+        }
 
         return result;
 }
-
 #define AO_HAVE_fetch_and_add
 
 /* NEC LE-IT: fetch and add1 for ARMv6 */
@@ -146,13 +146,12 @@ __asm {
         ldrex   result, [p]
         add     tmp, result, #1
         strex   tmp2, tmp, [p]
-        teq             tmp2, #0
+        teq     tmp2, #0
         bne     retry
         }
 
         return result;
 }
-
 #define AO_HAVE_fetch_and_add1
 
 /* NEC LE-IT: fetch and sub for ARMv6 */
@@ -167,32 +166,32 @@ __asm {
         ldrex   result, [p]
         sub     tmp, result, #1
         strex   tmp2, tmp, [p]
-        teq             tmp2, #0
+        teq     tmp2, #0
         bne     retry
         }
 
         return result;
 }
-
 #define AO_HAVE_fetch_and_sub1
 
 /* NEC LE-IT: compare and swap */
 /* Returns nonzero if the comparison succeeded. */
 AO_INLINE int
-AO_compare_and_swap(volatile AO_t *addr,
-                                AO_t old_val, AO_t new_val)
+AO_compare_and_swap(volatile AO_t *addr, AO_t old_val, AO_t new_val)
 {
          AO_t result,tmp;
 
 retry:
 __asm__ {
-        mov             result, #2
+        mov     result, #2
         ldrex   tmp, [addr]
-        teq             tmp, old_val
-        it              eq
+        teq     tmp, old_val
+#     ifdef __thumb__
+        it      eq
+#     endif
         strexeq result, new_val, [addr]
-        teq             result, #1
-        beq             retry
+        teq     result, #1
+        beq     retry
         }
 
         return !(result&2);
@@ -208,17 +207,17 @@ __asm inline double_ptr_storage load_ex(volatile AO_double_t *addr) {
 
 __asm inline int store_ex(AO_t val1, AO_t val2, volatile AO_double_t *addr) {
         STREXD r3,r0,r1,[r2]
-        MOV        r0,r3
+        MOV    r0,r3
 }
 
 AO_INLINE int
 AO_compare_double_and_swap_double(volatile AO_double_t *addr,
-                                                          AO_t old_val1, AO_t old_val2,
-                                                          AO_t new_val1, AO_t new_val2)
+                                  AO_t old_val1, AO_t old_val2,
+                                  AO_t new_val1, AO_t new_val2)
 {
-        double_ptr_storage old_val = ((double_ptr_storage)old_val2 << 32) | old_val1;
-
-    double_ptr_storage tmp;
+        double_ptr_storage old_val =
+                        ((double_ptr_storage)old_val2 << 32) | old_val1;
+        double_ptr_storage tmp;
         int result;
 
         while(1) {
@@ -228,8 +227,6 @@ AO_compare_double_and_swap_double(volatile AO_double_t *addr,
                 if(!result)     return 1;
         }
 }
-
 #define AO_HAVE_compare_double_and_swap_double
 
-
 #endif // __TARGET_ARCH_ARM
diff --git a/src/atomic_ops/sysdeps/gcc/arm.h b/src/atomic_ops/sysdeps/gcc/arm.h
index 1c80c7f..e44f431 100644
--- a/src/atomic_ops/sysdeps/gcc/arm.h
+++ b/src/atomic_ops/sysdeps/gcc/arm.h
@@ -47,7 +47,8 @@ AO_nop_full(void)
         /* issue an data memory barrier (keeps ordering of memory transactions  */
         /* before and after this operation)                                     */
         unsigned int dest=0;
-        __asm__ __volatile__("mcr p15,0,%0,c7,c10,5" :"=&r"(dest) : : "memory");
+        __asm__ __volatile__("mcr p15,0,%0,c7,c10,5"
+                              : "=&r"(dest) : : "memory");
 #endif
 }
 
@@ -214,7 +215,9 @@ AO_compare_and_swap(volatile AO_t *addr,
 "1:     mov             %0, #2\n"       /* store a flag */
 "       ldrex   %1, [%3]\n"             /* get original */
 "       teq             %1, %4\n"       /* see if match */
-"       it              eq\n"
+#       ifdef __thumb__
+  "       it            eq\n"
+#       endif
 "       strexeq %0, %5, [%3]\n"         /* store new one if matched */
 "       teq             %0, #1\n"
 "       beq             1b\n"           /* if update failed, repeat */
@@ -231,10 +234,11 @@ AO_compare_double_and_swap_double(volatile AO_double_t *addr,
                                   AO_t old_val1, AO_t old_val2,
                                   AO_t new_val1, AO_t new_val2)
 {
-        double_ptr_storage old_val = ((double_ptr_storage)old_val2 << 32) | old_val1;
-        double_ptr_storage new_val = ((double_ptr_storage)new_val2 << 32) | new_val1;
-
-    double_ptr_storage tmp;
+        double_ptr_storage old_val =
+                        ((double_ptr_storage)old_val2 << 32) | old_val1;
+        double_ptr_storage new_val =
+                        ((double_ptr_storage)new_val2 << 32) | new_val1;
+        double_ptr_storage tmp;
         int result;
 
         while(1) {
diff --git a/tests/.cvsignore b/tests/.cvsignore
index f3c7a7c..ba5a932 100644
--- a/tests/.cvsignore
+++ b/tests/.cvsignore
@@ -1 +1,7 @@
+*.o
 Makefile
+list_atomic.i
+test_atomic
+test_atomic_pthreads
+test_malloc
+test_stack