- S390 asm had a bug; I forgot to update the clobber list. Lucky for me,libaio.0-3-102.1

  newer compilers complain about such things.
- Also update the s390 asm to look more like the new kernel variants.

2 files changed, 59 insertions, 42 deletions

diff --git a/libaio.spec b/libaio.spec
index af35b59..3f98864 100644
--- a/libaio.spec
+++ b/libaio.spec
@@ -1,5 +1,5 @@
 Name: libaio
-Version: 0.3.101
+Version: 0.3.102
 Release: 1
 Summary: Linux-native asynchronous I/O access library
 Copyright: LGPL
@@ -59,6 +59,11 @@ make install prefix=$RPM_BUILD_ROOT/usr \
 %attr(0644,root,root) %{_libdir}/libaio.a
 
 %changelog
+* Thu Oct 14 2004 Jeff Moyer <jmoyer@redhat.com> - 0.3.102-1
+- S390 asm had a bug; I forgot to update the clobber list.  Lucky for me,
+  newer compilers complain about such things.
+- Also update the s390 asm to look more like the new kernel variants.
+
 * Wed Oct 13 2004 Jeff Moyer <jmoyer@redhat.com> - 0.3.101-1
 - Revert syscall return values to be -ERRNO.  This was an inadvertant bug
   introduced when clobber lists changed.
diff --git a/src/syscall-s390.h b/src/syscall-s390.h
index 515c217..3ec5ee3 100644
--- a/src/syscall-s390.h
+++ b/src/syscall-s390.h
@@ -4,37 +4,25 @@
 #define __NR_io_submit		246
 #define __NR_io_cancel		247
 
-#define _svc_clobber "2", "cc", "memory"
-
-#ifdef __s390x__
-#define __LR "lgr " /* 64 bit load register */
-#else
-#define __LR "lr	" /* 32 bit load register */
-#endif
-
-#define io_syscall0(type,fname,sname)				\
-type fname(void) {						\
-	long __res;						\
-	__asm__ __volatile__ (					\
-		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
-		: "i" (__NR_##sname)				\
-		: _svc_clobber );				\
-	return (type) __res;					\
-}
+#define io_svc_clobber "1", "cc", "memory"
 
 #define io_syscall1(type,fname,sname,type1,arg1)		\
 type fname(type1 arg1) {					\
 	register type1 __arg1 asm("2") = arg1;			\
+	register long __svcres asm("2");			\
 	long __res;						\
 	__asm__ __volatile__ (					\
+		"    .if %1 < 256\n"				\
 		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
+		"    .else\n"					\
+		"    la  %%r1,%1\n"				\
+		"    .svc 0\n"					\
+		"    .endif"					\
+		: "=d" (__svcres)				\
 		: "i" (__NR_##sname),				\
-		  "d" (__arg1)					\
-		: _svc_clobber );				\
+		  "0" (__arg1)					\
+		: io_svc_clobber );				\
+	__res = __svcres;					\
 	return (type) __res;					\
 }
 
@@ -42,34 +30,46 @@ type fname(type1 arg1) {					\
 type fname(type1 arg1, type2 arg2) {				\
 	register type1 __arg1 asm("2") = arg1;			\
 	register type2 __arg2 asm("3") = arg2;			\
+	register long __svcres asm("2");			\
 	long __res;						\
 	__asm__ __volatile__ (					\
+		"    .if %1 < 256\n"				\
 		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
+		"    .else\n"					\
+		"    la %%r1,%1\n"				\
+		"    svc 0\n"					\
+		"    .endif"					\
+		: "=d" (__svcres)				\
 		: "i" (__NR_##sname),				\
-		  "d" (__arg1),					\
+		  "0" (__arg1),					\
 		  "d" (__arg2)					\
-		: _svc_clobber );				\
+		: io_svc_clobber );				\
+	__res = __svcres;					\
 	return (type) __res;					\
 }
 
 #define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,	\
 		    type3,arg3)					\
-type fname(type1 arg1, type2 arg2, type3 arg3) {			\
+type fname(type1 arg1, type2 arg2, type3 arg3) {		\
 	register type1 __arg1 asm("2") = arg1;			\
 	register type2 __arg2 asm("3") = arg2;			\
 	register type3 __arg3 asm("4") = arg3;			\
+	register long __svcres asm("2");			\
 	long __res;						\
 	__asm__ __volatile__ (					\
+		"    .if %1 < 256\n"				\
 		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
+		"    .else\n"					\
+		"    la  %%r1,%1\n"				\
+		"    svc 0\n"					\
+		"    .endif"					\
+		: "=d" (__svcres)				\
 		: "i" (__NR_##sname),				\
-		  "d" (__arg1),					\
+		  "0" (__arg1),					\
 		  "d" (__arg2),					\
 		  "d" (__arg3)					\
-		: _svc_clobber );				\
+		: io_svc_clobber );				\
+	__res = __svcres;					\
 	return (type) __res;					\
 }
 
@@ -80,40 +80,52 @@ type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) {	\
 	register type2 __arg2 asm("3") = arg2;			\
 	register type3 __arg3 asm("4") = arg3;			\
 	register type4 __arg4 asm("5") = arg4;			\
+	register long __svcres asm("2");			\
 	long __res;						\
 	__asm__ __volatile__ (					\
+		"    .if %1 < 256\n"				\
 		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
+		"    .else\n"					\
+		"    la  %%r1,%1\n"				\
+		"    svc 0\n"					\
+		"    .endif"					\
+		: "=d" (__svcres)				\
 		: "i" (__NR_##sname),				\
-		  "d" (__arg1),					\
+		  "0" (__arg1),					\
 		  "d" (__arg2),					\
 		  "d" (__arg3),					\
 		  "d" (__arg4)					\
-		: _svc_clobber );				\
+		: io_svc_clobber );				\
+	__res = __svcres;					\
 	return (type) __res;					\
 }
 
 #define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,	\
 		    type3,arg3,type4,arg4,type5,arg5)		\
 type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4,	\
-	   type5 arg5) {						\
+	   type5 arg5) {					\
 	register type1 __arg1 asm("2") = arg1;			\
 	register type2 __arg2 asm("3") = arg2;			\
 	register type3 __arg3 asm("4") = arg3;			\
 	register type4 __arg4 asm("5") = arg4;			\
 	register type5 __arg5 asm("6") = arg5;			\
+	register long __svcres asm("2");			\
 	long __res;						\
 	__asm__ __volatile__ (					\
+		"    .if %1 < 256\n"				\
 		"    svc %b1\n"					\
-		"    "__LR" %0,2"				\
-		: "=d" (__res)					\
+		"    .else\n"					\
+		"    la  %%r1,%1\n"				\
+		"    svc 0\n"					\
+		"    .endif"					\
+		: "=d" (__svcres)				\
 		: "i" (__NR_##sname),				\
-		  "d" (__arg1),					\
+		  "0" (__arg1),					\
 		  "d" (__arg2),					\
 		  "d" (__arg3),					\
 		  "d" (__arg4),					\
 		  "d" (__arg5)					\
-		: _svc_clobber );				\
+		: io_svc_clobber );				\
+	__res = __svcres;					\
 	return (type) __res;					\
 }