- Add Alpha architecture support. (Sergey Tikhonov <tsv@solvo.ru>)

4 files changed, 216 insertions, 2 deletions

diff --git a/libaio.spec b/libaio.spec
index dd89ed8..efa1189 100644
--- a/libaio.spec
+++ b/libaio.spec
@@ -1,5 +1,5 @@
 Name: libaio
-Version: 0.3.103
+Version: 0.3.104
 Release: 1
 Summary: Linux-native asynchronous I/O access library
 Copyright: LGPL
@@ -59,6 +59,9 @@ make install prefix=$RPM_BUILD_ROOT/usr \
 %attr(0644,root,root) %{_libdir}/libaio.a
 
 %changelog
+* Fri Apr  1 2005 Jeff Moyer <jmoyer@redhat.com> - 0.3.104-1
+- Add Alpha architecture support.  (Sergey Tikhonov <tsv@solvo.ru>)
+
 * Tue Jan 25 2005 Jeff Moyer <jmoyer@redhat.com> - 0.3.103-1
 - Fix SONAME breakage.  In changing file names around, I also changed the 
   SONAME, which is a no no.
diff --git a/src/libaio.h b/src/libaio.h
index e426f9b..6574601 100644
--- a/src/libaio.h
+++ b/src/libaio.h
@@ -52,7 +52,7 @@ typedef enum io_iocb_cmd {
 #define PADDED(x, y)	x; unsigned y
 #define PADDEDptr(x, y)	x; unsigned y
 #define PADDEDul(x, y)	unsigned long x; unsigned y
-#elif defined(__ia64__) || defined(__x86_64__)
+#elif defined(__ia64__) || defined(__x86_64__) || defined(__alpha__)
 #define PADDED(x, y)	x, y
 #define PADDEDptr(x, y)	x
 #define PADDEDul(x, y)	unsigned long x
diff --git a/src/syscall-alpha.h b/src/syscall-alpha.h
new file mode 100644
index 0000000..467b74f
--- /dev/null
+++ b/src/syscall-alpha.h
@@ -0,0 +1,209 @@
+#define __NR_io_setup		398
+#define __NR_io_destroy		399
+#define __NR_io_getevents	400
+#define __NR_io_submit		401
+#define __NR_io_cancel		402
+
+#define inline_syscall_r0_asm
+#define inline_syscall_r0_out_constraint        "=v"
+
+#define inline_syscall_clobbers                    \
+   "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
+   "$22", "$23", "$24", "$25", "$27", "$28", "memory"
+
+#define inline_syscall0(name, args...)                          \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_19 __asm__("$19");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2"                              \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19)                                       \
+	   : "0"(_sc_0)                                         \
+	   : inline_syscall_clobbers,                           \
+             "$16", "$17", "$18", "$20", "$21");                \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall1(name,arg1)                              \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_19 __asm__("$19");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3"                           \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16)                         \
+	   : "0"(_sc_0), "2"(_sc_16)                            \
+	   : inline_syscall_clobbers,                           \
+             "$17", "$18", "$20", "$21");                       \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall2(name,arg1,arg2)                         \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_17 __asm__("$17");                    \
+        register long _sc_19 __asm__("$19");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        _sc_17 = (long) (arg2);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3 %4"                        \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17)           \
+	   : "0"(_sc_0), "2"(_sc_16), "3"(_sc_17)               \
+	   : inline_syscall_clobbers,                           \
+             "$18", "$20", "$21");                              \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall3(name,arg1,arg2,arg3)                    \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_17 __asm__("$17");                    \
+        register long _sc_18 __asm__("$18");                    \
+        register long _sc_19 __asm__("$19");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        _sc_17 = (long) (arg2);                                 \
+        _sc_18 = (long) (arg3);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3 %4 %5"                     \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17),          \
+             "=r"(_sc_18)                                       \
+	   : "0"(_sc_0), "2"(_sc_16), "3"(_sc_17),              \
+             "4"(_sc_18)                                        \
+	   : inline_syscall_clobbers, "$20", "$21");            \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall4(name,arg1,arg2,arg3,arg4)               \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_17 __asm__("$17");                    \
+        register long _sc_18 __asm__("$18");                    \
+        register long _sc_19 __asm__("$19");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        _sc_17 = (long) (arg2);                                 \
+        _sc_18 = (long) (arg3);                                 \
+        _sc_19 = (long) (arg4);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3 %4 %5 %6"                  \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17),          \
+             "=r"(_sc_18)                                       \
+	   : "0"(_sc_0), "2"(_sc_16), "3"(_sc_17),              \
+             "4"(_sc_18), "1"(_sc_19)                           \
+	   : inline_syscall_clobbers, "$20", "$21");            \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5)          \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_17 __asm__("$17");                    \
+        register long _sc_18 __asm__("$18");                    \
+        register long _sc_19 __asm__("$19");                    \
+        register long _sc_20 __asm__("$20");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        _sc_17 = (long) (arg2);                                 \
+        _sc_18 = (long) (arg3);                                 \
+        _sc_19 = (long) (arg4);                                 \
+        _sc_20 = (long) (arg5);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7"               \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17),          \
+             "=r"(_sc_18), "=r"(_sc_20)                         \
+	   : "0"(_sc_0), "2"(_sc_16), "3"(_sc_17),              \
+             "4"(_sc_18), "1"(_sc_19), "5"(_sc_20)              \
+	   : inline_syscall_clobbers, "$21");                   \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6)     \
+{                                                               \
+        register long _sc_0 inline_syscall_r0_asm;              \
+        register long _sc_16 __asm__("$16");                    \
+        register long _sc_17 __asm__("$17");                    \
+        register long _sc_18 __asm__("$18");                    \
+        register long _sc_19 __asm__("$19");                    \
+        register long _sc_20 __asm__("$20");                    \
+        register long _sc_21 __asm__("$21");                    \
+                                                                \
+        _sc_0 = name;                                           \
+        _sc_16 = (long) (arg1);                                 \
+        _sc_17 = (long) (arg2);                                 \
+        _sc_18 = (long) (arg3);                                 \
+        _sc_19 = (long) (arg4);                                 \
+        _sc_20 = (long) (arg5);                                 \
+        _sc_21 = (long) (arg6);                                 \
+        __asm__ __volatile__                                    \
+          ("callsys # %0 %1 <= %2 %3 %4 %5 %6 %7 %8"            \
+	   : inline_syscall_r0_out_constraint (_sc_0),          \
+             "=r"(_sc_19), "=r"(_sc_16), "=r"(_sc_17),          \
+             "=r"(_sc_18), "=r"(_sc_20), "=r"(_sc_21)           \
+	   : "0"(_sc_0), "2"(_sc_16), "3"(_sc_17), "4"(_sc_18), \
+             "1"(_sc_19), "5"(_sc_20), "6"(_sc_21)              \
+	   : inline_syscall_clobbers);                          \
+        _sc_ret = _sc_0, _sc_err = _sc_19;                      \
+}
+
+#define INLINE_SYSCALL1(name, nr, args...)      \
+({                                              \
+        long _sc_ret, _sc_err;                  \
+        inline_syscall##nr(__NR_##name, args);  \
+        if (_sc_err != 0)                       \
+        {                                       \
+            _sc_ret = -(_sc_ret);               \
+        }                                       \
+        _sc_ret;                                \
+})
+
+#define io_syscall1(type,fname,sname,type1,arg1)			\
+type fname(type1 arg1)							\
+{                                                                       \
+   return (type)INLINE_SYSCALL1(sname, 1, arg1);                        \
+}
+
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)		\
+type fname(type1 arg1,type2 arg2)					\
+{									\
+   return (type)INLINE_SYSCALL1(sname, 2, arg1, arg2);                  \
+}
+
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3)	\
+type fname(type1 arg1,type2 arg2,type3 arg3)				\
+{									\
+   return (type)INLINE_SYSCALL1(sname, 3, arg1, arg2, arg3);            \
+}
+
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type fname (type1 arg1, type2 arg2, type3 arg3, type4 arg4)		\
+{									\
+   return (type)INLINE_SYSCALL1(sname, 4, arg1, arg2, arg3, arg4);      \
+}
+
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
+	  type5,arg5)							\
+type fname (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5)	\
+{									\
+   return (type)INLINE_SYSCALL1(sname, 5, arg1, arg2, arg3, arg4, arg5);\
+}
diff --git a/src/syscall.h b/src/syscall.h
index 4b8e794..0283825 100644
--- a/src/syscall.h
+++ b/src/syscall.h
@@ -20,6 +20,8 @@
 #include "syscall-ppc.h"
 #elif defined(__s390__)
 #include "syscall-s390.h"
+#elif defined(__alpha__)
+#include "syscall-alpha.h"
 #else
 #error "add syscall-arch.h"
 #endif