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* DDR3: Round down PC3 numbers to comply with Jedec.khali2013-04-132-0/+3
* DDR3: Round core timings up, not down.khali2013-04-132-4/+5
* DDR3: Use the right nibble from byte 21 as the MSB of tRAS.khali2013-04-132-1/+2
* Fix build error (NULL undefined) caused by missing include filegroeck2013-03-022-0/+2
* Decode more DDR3 module typeskhali2013-02-132-1/+5
* Prevent hang on reserved DDR3 module typekhali2013-02-132-1/+2
* Update CHANGES to reflect tools build fixgroeck2012-12-211-0/+1
* Build fails with recent versions of gcc/ld.groeck2012-12-211-4/+4
* i2cdetect: Clarify the SMBus commands used for probing by default.khali2012-12-202-4/+9
* Print timings at standard PC speeds. The minimum cycle times for thekhali2012-12-202-2/+25
* Fix decoding of SDR SPD revision. The encoding changed with revisionkhali2012-12-202-1/+4
* Add section headers for SDR modules, to make the output easier to read.khali2012-12-202-2/+4
* Remove duplicate "ns" in SDR timings.khali2012-12-202-5/+2
* Strip former manufacturer name in side-by-side output mode, to avoidkhali2012-12-202-0/+2
* If DDR3 manufacturer page count parity is wrong, still print thekhali2012-12-202-3/+7
* Add manufacturer names from Jedec document JEP106AJ.khali2012-12-202-2/+7
* Introduce helper function as_ddr(), hopefully this makes the code akhali2012-12-201-8/+16
* ddr2_core_timings is now the exact same function as ddr_core_timingskhali2012-12-201-13/+5
* Print timings at standard DDR speeds. The minimum cycle times for thekhali2012-12-202-13/+35
* Print timings at standard DDR2 speeds. The minimum cycle times for thekhali2012-12-202-15/+37
* Missed update.khali2012-10-251-1/+1
* decode-dimms: Print DDR2 core timings for all supported CAS values, askhali2012-10-251-9/+23
* decode-dimms: Print only the DDR2 timings which were properly defined.khali2012-10-252-21/+44
* decode-dimms: Print DDR2 equivalent speed of tCK max.khali2012-10-252-3/+6
* decode-dimms: Print DDR core timings for all supported CAS values.khali2012-10-252-14/+26
* decode-dimms: Print extra timing values for DDR memory modules as we dokhali2012-10-252-1/+47
* decode-dimms: Default to merging cells in side-by-side output mode.khali2012-10-252-0/+10
* Don't let missing DDR2 SPD revision or PLL relock time break side-by-side out...khali2012-10-222-6/+4
* Print a space before "MHz" to improve readability.khali2012-10-221-7/+7
* Print the number of banks, rows, columns and ranks for DDR modules askhali2012-10-212-0/+5
* Don't let missing DDR module height break side-by-side output.khali2012-10-212-7/+6
* Update vendor list based on Jedec document JEP106AG. Contributed bykhali2012-09-101-13/+56
* Move the code to a function, it's cleaner.khali2012-09-071-4/+12
* Optimize the code which computes the column width.khali2012-09-071-8/+10
* In side-by-side merged cells mode, don't make columns larger than theykhali2012-09-072-3/+19
* Consistently use "SMBus receive byte" for the short byte read we usekhali2012-09-072-4/+4
* If either SMBus Quick Write or SMBus Receive Byte command is missing,khali2012-09-072-15/+42
* Don't choke when no SPD EEPROM is found while the eeprom or at24 driver iskhali2012-07-192-5/+7
* Read EEPROM contents before printing headers.khali2012-07-191-14/+14
* Ignore .ao files.khali2012-07-100-0/+0
* libi2c: Use I2C_SMBUS_BLOCK_MAX instead of hard-coding 32khali2012-07-102-8/+9
* libi2c: Properly propagate real error codes on read errorskhali2012-07-102-43/+64
* Add a copy of the LGPL v2.1, and clarify licenses.khali2012-05-213-0/+512
* New library for I2C device access under Linux. As a first step, thekhali2012-05-218-191/+379
* Add header file missed from a previous commit.khali2012-05-211-0/+212
* Tools depends on header file version.h. Add the missing dependency tokhali2012-05-211-4/+4
* i2c-dev: Move SMBus helper functions to include/i2c/smbus.hkhali2012-04-2615-273/+41
* i2c-dev.h: Minimize differences with kernel flavorkhali2012-04-262-34/+29
* decode-dimms: Use short name in side-by-side output mode also whenkhali2012-04-191-1/+2
* Decode and print bus width extension of DDR3 memory modules.khali2012-04-182-0/+4