| Commit message (Collapse) | Author | Age | Files | Lines |
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It now has its own class, and the addImport function is defined in that
class, rather than needing to be passed as an argument.
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Darwin x86 has inconsistent PIC base register, so splitting (which happened before)
ensures that each cmm procedure only has one entry point (namely the first block).
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per cmm procedure on Darwin/PPC, because of splitting.
x86 should be treated the same way, I'll come back to that later.
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add FETCHPC to all of them (this fixes #7814).
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I don't think the x86-64 version is quite right, but this ought to be
enough to pass cgrun071.
This code is terrible and needs a complete refactor. There's a lot of
duplication, and we ought to be specifying the ABI in a much more
abstract way (like LLVM).
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Thanks to @PHO on #7498 for pointing this out.
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This patch is ported from #7510, which fixes the same bug in the x86 nativeGen.
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We have to reduce the maximum number of instructions to jump over depending on the number of info tables in a proc.
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Its implementation is totally specific to PPC.
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This patch adds support for 6 XMM registers on x86-64 which overlap with the F
and D registers and may hold 128-bit wide SIMD vectors. Because there is not a
good way to attach type information to STG registers, we aggressively bitcast in
the LLVM back-end.
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This patch lays the groundwork needed for primop support for SIMD vectors. In
addition to the groundwork, we add support for the FloatX4# primitive type and
associated primops.
* Add the FloatX4# primitive type and associated primops.
* Add CodeGen support for Float vectors.
* Compile vector operations to LLVM vector operations in the LLVM code
generator.
* Make the x86 native backend fail gracefully when encountering vector primops.
* Only generate primop wrappers for vector primops when using LLVM.
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I don't actually know if suggesting -fllvm as a workaround is useful
advice, but -fvia-C certainly won't help as it doesn't do anything
any more.
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This will add the following preprocessor defines when Haskell source
files are compiled:
* __SSE__ - If any version of SSE is enabled
* __SSE2__ - If SSE2 or greater is enabled
* __SSE4_2_ - If SSE4.2 is enabled
Note that SSE2 is enabled by default on x86-64.
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There were four bugs here. Clearly I didn't test this enough to
expose the bugs - it appeared to work on x86/Linux, but completely by
accident it seems.
1. the delta was wrong by a factor of the slot size (as noted on #7498)
2. we weren't correctly aligning the stack pointer (sp needs to be
16-byte aligned on x86/x86_64)
3. we were doing the adjustment multiple times in the case of a block
that was both a return point and a local branch target. To fix this I
had to add new shim blocks to adjust the stack pointer, and retarget
the original branches. See comment for details.
4. we were doing the adjustment for CALL instructions, which is
unnecessary and wrong; only JMPs should be preceded by a stack
adjustment.
(Someone with a PPC box will need to update the PPC version of
allocMoreStack to fix the above bugs, using the x86 version as a
guide.)
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Fixes #7498.
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We don't yet have the slow path, for when we have to fall back to
separate compilation.
We also only currently handle the case qhere we're compiling Haskell
code with the NCG.
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This patch adds more of the plumbing necessary to allow the nativeGen
to build multiple ways in a single compilation.
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We were always passing 0 to cmmNativeGenStream, so now the 0 is just
hardcoded there.
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This will make it a little more pleasant to have the nativegen
build for multiple ways at once.
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No functional changes.
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No functional changes.
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This reverts the compiler parts of
commit 7b594a5d7ac29972db39228e9c8b7f384313f39b
Author: David Terei <davidterei@gmail.com>
Date: Mon Nov 21 12:05:18 2011 -0800
Remove registerised code for dead architectures: mips, ia64, alpha,
hppa1, m68k
In particular, we want to know whether bewareLoadStoreAlignment should
return True or False for them.
It also reverts
commit 3fc68b5c356b39b2b52a86d953367d0021c13262
Author: Simon Marlow <marlowsd@gmail.com>
Date: Wed Jan 4 11:44:02 2012 +0000
Remove missing archs (mipseb, mipsel, alpha) (#5734)
It doesn't hurt to map these to ArchUnknown since we don't need to
know anything specific about them, and adding them would be a pain
(there are a bunch of places where we have to case-match on all the
arches to avoid warnings).
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This removes the OldCmm data type and the CmmCvt pass that converts
new Cmm to OldCmm. The backends (NCGs, LLVM and C) have all been
converted to consume new Cmm.
The main difference between the two data types is that conditional
branches in new Cmm have both true/false successors, whereas in OldCmm
the false case was a fallthrough. To generate slightly better code we
occasionally need to invert a conditional to ensure that the
branch-not-taken becomes a fallthrough; this was previously done in
CmmCvt, and it is now done in CmmContFlowOpt.
We could go further and use the Hoopl Block representation for native
code, which would mean that we could use Hoopl's postorderDfs and
analyses for native code, but for now I've left it as is, using the
old ListGraph representation for native code.
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