summaryrefslogtreecommitdiff
path: root/compiler/nativeGen
Commit message (Collapse)AuthorAgeFilesLines
...
* nativeGen: detabify/dewhitespace SPARC/CodeGen/BaseAustin Seipp2014-07-201-53/+41
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CodeGen/Gen32Austin Seipp2014-07-201-373/+361
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CodeGen/SanityAustin Seipp2014-07-201-53/+42
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CodeGen/ExpandAustin Seipp2014-07-201-106/+91
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CodeGen/AmodeAustin Seipp2014-07-201-23/+15
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CodeGen/CondCodeAustin Seipp2014-07-201-29/+21
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/CondAustin Seipp2014-07-201-29/+21
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/RegsAustin Seipp2014-07-201-145/+137
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/InstrAustin Seipp2014-07-201-311/+302
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/ShortcutJumpAustin Seipp2014-07-201-21/+10
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/ImmAustin Seipp2014-07-201-42/+32
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SPARC/StackAustin Seipp2014-07-201-29/+20
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace TargetRegAustin Seipp2014-07-201-22/+12
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace RegClassAustin Seipp2014-07-201-28/+20
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace PPC/RegInfoAustin Seipp2014-07-201-16/+7
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace PPC/CondAustin Seipp2014-07-201-25/+17
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace X86/RegInfoAustin Seipp2014-07-201-19/+11
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace RegAustin Seipp2014-07-201-127/+116
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* nativeGen: detabify/dewhitespace SizeAustin Seipp2014-07-201-51/+44
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* remove SPARC related comment in PPC code generatorPeter Trommler2014-07-101-9/+0
| | | | | | | | | | | | | | | | Summary: PowerPC does not do delay slots and there is also no requirement to put extra instructions between FP operations and branches. Test Plan: None. Comment change only. Reviewers: austin, simonmar Reviewed By: austin, simonmar Subscribers: simonmar, relrod, carter Differential Revision: https://phabricator.haskell.org/D40
* Re-add more primops for atomic ops on byte arraysJohan Tibell2014-06-306-2/+212
| | | | | | | | | | | | | | | | | | | | | | | This is the second attempt to add this functionality. The first attempt was reverted in 950fcae46a82569e7cd1fba1637a23b419e00ecd, due to register allocator failure on x86. Given how the register allocator currently works, we don't have enough registers on x86 to support cmpxchg using complicated addressing modes. Instead we fall back to a simpler addressing mode on x86. Adds the following primops: * atomicReadIntArray# * atomicWriteIntArray# * fetchSubIntArray# * fetchOrIntArray# * fetchXorIntArray# * fetchAndIntArray# Makes these pre-existing out-of-line primops inline: * fetchAddIntArray# * casIntArray#
* Revert "Add more primops for atomic ops on byte arrays"Johan Tibell2014-06-266-194/+2
| | | | | | | | This commit caused the register allocator to fail on i386. This reverts commit d8abf85f8ca176854e9d5d0b12371c4bc402aac3 and 04dd7cb3423f1940242fdfe2ea2e3b8abd68a177 (the second being a fix to the first).
* Add more primops for atomic ops on byte arraysJohan Tibell2014-06-246-2/+194
| | | | | | | | | | | | | | | | | | | Summary: Add more primops for atomic ops on byte arrays Adds the following primops: * atomicReadIntArray# * atomicWriteIntArray# * fetchSubIntArray# * fetchOrIntArray# * fetchXorIntArray# * fetchAndIntArray# Makes these pre-existing out-of-line primops inline: * fetchAddIntArray# * casIntArray#
* Some typos in commentsGabor Greif2014-06-111-1/+1
|
* Make better use of the x86 addressing modeJohan Tibell2014-06-101-0/+9
| | | | | | | | | | | | | We now emit movq %rdi,16(%r14,%rsi,8) instead of leaq 16(%r14),%rax movq %rdi,(%rax,%rsi,8) This helps e.g. byte array indexing.
* Fix discarding of unreachable code in the register allocator (#9155)Simon Marlow2014-06-061-4/+10
| | | | | | | A previous fix to this was wrong: f5879acd018494b84233f26fba828ce376d0f81d and left some unreachable code behind. So rather than try to be clever and do this at the same time as the strongly-connected-component analysis, I'm doing a separate reachability pass first.
* Add LANGUAGE pragmas to compiler/ source filesHerbert Valerio Riedel2014-05-1538-31/+64
| | | | | | | | | | | | | | | | | | In some cases, the layout of the LANGUAGE/OPTIONS_GHC lines has been reorganized, while following the convention, to - place `{-# LANGUAGE #-}` pragmas at the top of the source file, before any `{-# OPTIONS_GHC #-}`-lines. - Moreover, if the list of language extensions fit into a single `{-# LANGUAGE ... -#}`-line (shorter than 80 characters), keep it on one line. Otherwise split into `{-# LANGUAGE ... -#}`-lines for each individual language extension. In both cases, try to keep the enumeration alphabetically ordered. (The latter layout is preferable as it's more diff-friendly) While at it, this also replaces obsolete `{-# OPTIONS ... #-}` pragma occurences by `{-# OPTIONS_GHC ... #-}` pragmas.
* ghc: initial AArch64 patchesColin Watson2014-04-215-0/+12
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* Validate inferred theta. Fixes #8883Jan Stolarek2014-04-192-0/+2
| | | | | | | This checks that all the required extensions are enabled for the inferred type signature. Updates binary and vector submodules.
* Use the correct callClobberedRegs on Windows/x64 (#8834)Simon Marlow2014-03-271-0/+3
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* Add flags to control memcpy and memset inliningJohan Tibell2014-03-261-26/+30
| | | | | | | This adds -fmax-inline-memcpy-insns and -fmax-inline-memset-insns. These flags control when we inline calls to memcpy/memset with statically known arguments. The flag naming style is taken from GCC and the same limit is used by both GCC and LLVM.
* PPC: Fix loads of PIC data with > 16 bit offsets (#7830).Erik de Castro Lopo2014-02-281-2/+3
| | | | Loads should now handle up to 32 bit offsets.
* Manual hlinting: or (map f) = any fJoachim Breitner2014-02-131-1/+1
|
* Fix a popular typo in commentsGabor Greif2014-02-012-2/+2
|
* Disable -fregs-graph (#7679, #8657)Simon Marlow2014-01-161-2/+4
|
* nativeGen: Fix spelling in commentBen Gamari2014-01-071-1/+1
| | | | Signed-off-by: Austin Seipp <austin@well-typed.com>
* TyposKrzysztof Gogolewski2013-10-121-1/+1
|
* Future-proof code for upcoming `array-0.5.0.0`Herbert Valerio Riedel2013-10-111-4/+4
| | | | | | This way CPP conditionals can be avoided for the transition period. Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
* Add support for prefetch with locality levels.Austin Seipp2013-10-015-7/+56
| | | | | | | | | | | | | | | | | This patch adds support for several new primitive operations which support using processor-specific instructions to help guide data and cache locality decisions. We have levels ranging from [0..3] For LLVM, we generate llvm.prefetch intrinsics at the proper locality level (similar to GCC.) For x86 we generate prefetch{NTA, t2, t1, t0} instructions. On SPARC and PowerPC, the locality levels are ignored. This closes #8256. Authored-by: Carter Tazio Schonwald <carter.schonwald@gmail.com> Signed-off-by: Austin Seipp <austin@well-typed.com>
* Globally replace "hackage.haskell.org" with "ghc.haskell.org"Simon Marlow2013-10-0120-20/+20
|
* Discard unreachable code in the register allocator (#7574)Simon Marlow2013-09-233-15/+48
| | | | | | | | | | | | | | | | | | | The problem with unreachable code is that it might refer to undefined registers. This happens accidentally: a block can be orphaned by an optimisation, for example when the result of a comparsion becomes known. The register allocator panics when it finds an undefined register, because they shouldn't occur in generated code. So we need to also discard unreachable code to prevent this panic being triggered by optimisations. The register alloator already does a strongly-connected component analysis, so it ought to be easy to make it discard unreachable code as part of that traversal. It turns out that we need a different variant of the scc algorithm to do that (see Digraph), however the new variant also generates slightly better code by putting the blocks within a loop in a better order for register allocation.
* SIMD primops are now generated using schemas that are polymorphic inGeoffrey Mainland2013-09-221-0/+2
| | | | | | | | | | | | | width and element type. SIMD primops are now polymorphic in vector size and element type, but only internally to the compiler. More specifically, utils/genprimopcode has been extended so that it "knows" about SIMD vectors. This allows us to, for example, write a single definition for the "add two vectors" primop in primops.txt.pp and have it instantiated at many vector types. This generates a primop in GHC.Prim for each vector type at which "add two vectors" is instantiated, but only one data constructor for the PrimOp data type, so the code generator is much, much simpler.
* Fix AMP warnings.Austin Seipp2013-09-113-1/+27
| | | | | Authored-by: David Luposchainsky <dluposchainsky@gmail.com> Signed-off-by: Austin Seipp <austin@well-typed.com>
* Remove dead codeJan Stolarek2013-09-102-7/+1
|
* Add basic support for GHCJSAustin Seipp2013-09-065-0/+13
| | | | | | | | | | | | | | | | | | | This patch encompasses most of the basic infrastructure for GHCJS. It includes: * A new extension, -XJavaScriptFFI * A new architecture, ArchJavaScript * Parser and lexer support for 'foreign import javascript', only available under -XJavaScriptFFI, using ArchJavaScript. * As a knock-on, there is also a new 'WayCustom' constructor in DynFlags, so clients of the GHC API can add custom 'tags' to their built files. This should be useful for other users as well. The remaining changes are really just the resulting fallout, making sure all the cases are handled appropriately for DynFlags and Platform. Authored-by: Luite Stegeman <stegeman@gmail.com> Signed-off-by: Austin Seipp <aseipp@pobox.com>
* Add support for byte endian swapping for Word 16/32/64.Austin Seipp2013-07-176-0/+39
| | | | | | | | | | | | | * Exposes bSwap{,16,32,64}# primops * Add a new machop: MO_BSwap * Use a Stg implementation (hs_bswap{16,32,64}) for other implementation in NCG. * Generate bswap in X86 NCG for 32 and 64 bits, and for 16 bits, bswap+shr instead of using xchg. * Generate llvm.bswap intrinsics in llvm codegen. Authored-by: Vincent Hanquez <tab@snarc.org> Signed-off-by: Austin Seipp <aseipp@pobox.com>
* Fix many ASSERT uses under Clang.Austin Seipp2013-06-182-2/+2
| | | | | | Clang doesn't like whitespace between macro and arguments. Signed-off-by: Austin Seipp <aseipp@pobox.com>
* Revert "Add support for byte endian swapping for Word 16/32/64."Simon Peyton Jones2013-06-116-29/+0
| | | | This reverts commit 1c5b0511a89488f5280523569d45ee61c0d09ffa.
* Add support for byte endian swapping for Word 16/32/64.Ian Lynagh2013-06-096-0/+29
| | | | | | | | | | | | * Exposes bSwap{,16,32,64}# primops * Add a new machops MO_BSwap * Use a Stg implementation (hs_bswap{16,32,64}) for other implementation in NCG. * Generate bswap in X86 NCG for 32 and 64 bits, and for 16 bits, bswap+shr instead of using xchg. * Generate llvm.bswap intrinsics in llvm codegen. Patch from Vincent Hanquez.
* Make the current module available to labelDynamicIan Lynagh2013-05-133-59/+78
| | | | It doesn't actually use it yet