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* Implement SSE2 floating-point support in the x86 native code generator (#594)Simon Marlow2010-02-042-17/+19
| | | | | | | | | | | | | | | | | | | | | The new flag -msse2 enables code generation for SSE2 on x86. It results in substantially faster floating-point performance; the main reason for doing this was that our x87 code generation is appallingly bad, and since we plan to drop -fvia-C soon, we need a way to generate half-decent floating-point code. The catch is that SSE2 is only available on CPUs that support it (P4+, AMD K8+). We'll have to think hard about whether we should enable it by default for the libraries we ship. In the meantime, at least -msse2 should be an acceptable replacement for "-fvia-C -optc-ffast-math -fexcess-precision". SSE2 also has the advantage of performing all operations at the correct precision, so floating-point results are consistent with other platforms. I also tweaked the x87 code generation a bit while I was here, now it's slighlty less bad than before.
* Fix Trac #959: a long-standing bug in instantiating otherwise-unbound type ↵simonpj@microsoft.com2009-10-152-5/+5
| | | | | | | | | | | | | | | | | | | | | | | variables DO NOT MERGE TO GHC 6.12 branch (Reason: interface file format change.) The typechecker needs to instantiate otherwise-unconstraint type variables to an appropriately-kinded constant type, but we didn't have a supply of arbitrarily-kinded tycons for this purpose. Now we do. The details are described in Note [Any types] in TysPrim. The fundamental change is that there is a new sort of TyCon, namely AnyTyCon, defined in TyCon. Ter's a small change to interface-file binary format, because the new AnyTyCons have to be serialised. I tided up the handling of uniques a bit too, so that mkUnique is not exported, so that we can see all the different name spaces in one module.
* RTS tidyup sweep, first phaseSimon Marlow2009-08-022-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first phase of this tidyup is focussed on the header files, and in particular making sure we are exposinng publicly exactly what we need to, and no more. - Rts.h now includes everything that the RTS exposes publicly, rather than a random subset of it. - Most of the public header files have moved into subdirectories, and many of them have been renamed. But clients should not need to include any of the other headers directly, just #include the main public headers: Rts.h, HsFFI.h, RtsAPI.h. - All the headers needed for via-C compilation have moved into the stg subdirectory, which is self-contained. Most of the headers for the rest of the RTS APIs have moved into the rts subdirectory. - I left MachDeps.h where it is, because it is so widely used in Haskell code. - I left a deprecated stub for RtsFlags.h in place. The flag structures are now exposed by Rts.h. - Various internal APIs are no longer exposed by public header files. - Various bits of dead code and declarations have been removed - More gcc warnings are turned on, and the RTS code is more warning-clean. - More source files #include "PosixSource.h", and hence only use standard POSIX (1003.1c-1995) interfaces. There is a lot more tidying up still to do, this is just the first pass. I also intend to standardise the names for external RTS APIs (e.g use the rts_ prefix consistently), and declare the internal APIs as hidden for shared libraries.
* Remove unused importsIan Lynagh2009-07-076-6/+0
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* Trim unused imports detected by new unused-import codesimonpj@microsoft.com2009-07-062-2/+2
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* Follow vreg/hreg patch in PPC NCGBen.Lippmeier@anu.edu.au2009-05-261-7/+11
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* Follow vreg/hreg patch in x86 NCGBen.Lippmeier@anu.edu.au2009-05-192-8/+21
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* Don't try and coalesce RealReg->RealReg movesBen.Lippmeier@anu.edu.au2009-05-191-3/+7
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* Split Reg into vreg/hreg and add register pairsBen.Lippmeier@anu.edu.au2009-05-1812-503/+681
| | | | | | | | | | | | | * The old Reg type is now split into VirtualReg and RealReg. * For the graph coloring allocator, the type of the register graph is now (Graph VirtualReg RegClass RealReg), which shows that it colors in nodes representing virtual regs with colors representing real regs. (as was intended) * RealReg contains two contructors, RealRegSingle and RealRegPair, where RealRegPair is used to represent a SPARC double reg constructed from two single precision FP regs. * On SPARC we can now allocate double regs into an arbitrary register pair, instead of reserving some reg ranges to only hold float/double values.
* SPARC NCG: Fix available regs for graph allocatorBen.Lippmeier@anu.edu.au2009-04-211-3/+3
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* SPARC NCG: Base freeRegs on includes/MachRegs.h againBen.Lippmeier@anu.edu.au2009-04-201-0/+1
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* SPARC NCG: Don't release top half of f6 and f8Ben.Lippmeier@anu.edu.au2009-02-151-6/+8
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* NCG: Split up the native code generator into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-1518-384/+694
| | | | | | | | | | | | | | | | | | | | | | | | | | | - nativeGen/Instruction defines a type class for a generic instruction set. Each of the instruction sets we have, X86, PPC and SPARC are instances of it. - The register alloctors use this type class when they need info about a certain register or instruction, such as regUsage, mkSpillInstr, mkJumpInstr, patchRegs.. - nativeGen/Platform defines some data types enumerating the architectures and operating systems supported by the native code generator. - DynFlags now keeps track of the current build platform, and the PositionIndependentCode module uses this to decide what to do instead of relying of #ifdefs. - It's not totally retargetable yet. Some info info about the build target is still hardwired, but I've tried to contain most of it to a single module, TargetRegs. - Moved the SPILL and RELOAD instructions into LiveInstr. - Reg and RegClass now have their own modules, and are shared across all architectures.
* SPARC NCG: Make linear allocator use info in SPARC.Regs againBen.Lippmeier@anu.edu.au2009-02-111-47/+6
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* NCG: Split block reorder thing in linear allocator into separate fnBen.Lippmeier@anu.edu.au2009-02-132-20/+47
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* NCG: Validate fixes for powerpcBen.Lippmeier@anu.edu.au2009-02-131-0/+2
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* NCG: Split RegAllocInfo into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-041-1/+1
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* NCG: Move RegLiveness -> RegAlloc.LivenessBen.Lippmeier@anu.edu.au2009-02-0412-13/+718
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* NCG: Rename MachRegs, MachInstrs -> Regs, Instrs to reflect arch specific namingBen.Lippmeier@anu.edu.au2009-02-0414-22/+22
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* SPARC NCG: Fix some haddock problems.Ben.Lippmeier@anu.edu.au2009-02-043-7/+7
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* NCG: Move the graph allocator into its own dirBen.Lippmeier@anu.edu.au2009-02-038-0/+2108
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* SPARC NCG: Give regs o0-o5 back to the allocatorBen.Lippmeier@anu.edu.au2009-02-031-4/+42
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* NCG: Split out joinToTargets from linear alloctor into its own module.Ben.Lippmeier@anu.edu.au2009-02-033-228/+386
| | | | | * Also fix a nasty bug when creating fixup code that has a cyclic register movement graph.
* NCG: Split linear allocator into separate modules.Ben.Lippmeier@anu.edu.au2009-02-029-0/+1539