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This patch enhances Platform's ArchARM to include ARM ABI value. It also
tweaks configure machinery to detect hard-float ABI and to set it wherever
needed. Finally when hard-float ABI is in use, pass appropriate compiler
option to the LLVM's llc. Fixes #5914.
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hppa1, m68k
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This reverts commit 2dea11a442e1d14d86fa661804de06a721943bf0.
On second thoughts, this does make sense, for unregisterised via-C
arches at least.
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It doesn't make sense. If platformArch is ArchUnknown then we don't know
the answer to any questions about the arch. So now if we don't recognise
the arch we just fail, and the new arch will need to be added to the
datatype.
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CmmTop -> CmmDecl
CmmPgm -> CmmGroup
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This patch enhances ArchARM with ARM ISA and ISA extensions details
as is suggested in the comment in Platform.hs file. The patch is needed
by future patch which will use ARM ISA information in order to pass
appropriate command-line option to the LLVM llc tool.
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There's now a variant of the Outputable class that knows what
platform we're targetting:
class PlatformOutputable a where
pprPlatform :: Platform -> a -> SDoc
pprPlatformPrec :: Platform -> Rational -> a -> SDoc
and various instances have had to be converted to use that class,
and we pass Platform around accordingly.
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I observed that the [CmmStatics] within CmmData uses the list in a very stylised way.
The first item in the list is almost invariably a CmmDataLabel. Many parts of the
compiler pattern match on this list and fail if this is not true.
This patch makes the invariant explicit by introducing a structured type CmmStatics
that holds the label and the list of remaining [CmmStatic].
There is one wrinkle: the x86 backend sometimes wants to output an alignment directive just
before the label. However, this can be easily fixed up by parameterising the native codegen
over the type of CmmStatics (though the GenCmmTop parameterisation) and using a pair
(Alignment, CmmStatics) there instead.
As a result, I think we will be able to remove CmmAlign and CmmDataLabel from the CmmStatic
data type, thus nuking a lot of code and failing pattern matches. This change will come as part
of my next patch.
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Fixes more failures on arches without an NCG
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When we read a temporary value from memory, we should update its
assignment to be both in memory and in register. This was only
occurring when there was a free register, but not if we needed
to spill an existing value in a register to the stack. I generalized
the code for this case and applied it to the other two cases where
this occurs (spilled value is in memory and in a register, and when
the spilled value is only in a register.)
Furthermore, I tightened the invariants on allocRegsAndSpill_spill
with a new data type SpillLoc that captures more precisely than
Maybe Loc the possible locations we are spilling from.
Signed-off-by: Edward Z. Yang <ezyang@mit.edu>
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Signed-off-by: Edward Z. Yang <ezyang@mit.edu>
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This changes the new code generator to make use of the Hoopl package
for dataflow analysis. Hoopl is a new boot package, and is maintained
in a separate upstream git repository (as usual, GHC has its own
lagging darcs mirror in http://darcs.haskell.org/packages/hoopl).
During this merge I squashed recent history into one patch. I tried
to rebase, but the history had some internal conflicts of its own
which made rebase extremely confusing, so I gave up. The history I
squashed was:
- Update new codegen to work with latest Hoopl
- Add some notes on new code gen to cmm-notes
- Enable Hoopl lag package.
- Add SPJ note to cmm-notes
- Improve GC calls on new code generator.
Work in this branch was done by:
- Milan Straka <fox@ucw.cz>
- John Dias <dias@cs.tufts.edu>
- David Terei <davidterei@gmail.com>
Edward Z. Yang <ezyang@mit.edu> merged in further changes from GHC HEAD
and fixed a few bugs.
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* I've pushed the SPILL and RELOAD instrs down into the
LiveInstr type to make them easier to work with.
* When the graph allocator does a spill cycle it now just
re-annotates the LiveCmmTops instead of converting them
to NatCmmTops and back.
* This saves working out the SCCS again, and avoids rewriting
the SPILL and RELOAD meta instructions into real machine
instructions.
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If there are are unreachable basic blocks in the native code then the
linear allocator might loop. Detect this case and panic instead.
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The first phase of this tidyup is focussed on the header files, and in
particular making sure we are exposinng publicly exactly what we need
to, and no more.
- Rts.h now includes everything that the RTS exposes publicly,
rather than a random subset of it.
- Most of the public header files have moved into subdirectories, and
many of them have been renamed. But clients should not need to
include any of the other headers directly, just #include the main
public headers: Rts.h, HsFFI.h, RtsAPI.h.
- All the headers needed for via-C compilation have moved into the
stg subdirectory, which is self-contained. Most of the headers for
the rest of the RTS APIs have moved into the rts subdirectory.
- I left MachDeps.h where it is, because it is so widely used in
Haskell code.
- I left a deprecated stub for RtsFlags.h in place. The flag
structures are now exposed by Rts.h.
- Various internal APIs are no longer exposed by public header files.
- Various bits of dead code and declarations have been removed
- More gcc warnings are turned on, and the RTS code is more
warning-clean.
- More source files #include "PosixSource.h", and hence only use
standard POSIX (1003.1c-1995) interfaces.
There is a lot more tidying up still to do, this is just the first
pass. I also intend to standardise the names for external RTS APIs
(e.g use the rts_ prefix consistently), and declare the internal APIs
as hidden for shared libraries.
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* The old Reg type is now split into VirtualReg and RealReg.
* For the graph coloring allocator, the type of the register graph
is now (Graph VirtualReg RegClass RealReg), which shows that it colors
in nodes representing virtual regs with colors representing real regs.
(as was intended)
* RealReg contains two contructors, RealRegSingle and RealRegPair,
where RealRegPair is used to represent a SPARC double reg
constructed from two single precision FP regs.
* On SPARC we can now allocate double regs into an arbitrary register
pair, instead of reserving some reg ranges to only hold float/double values.
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- nativeGen/Instruction defines a type class for a generic
instruction set. Each of the instruction sets we have,
X86, PPC and SPARC are instances of it.
- The register alloctors use this type class when they need
info about a certain register or instruction, such as
regUsage, mkSpillInstr, mkJumpInstr, patchRegs..
- nativeGen/Platform defines some data types enumerating
the architectures and operating systems supported by the
native code generator.
- DynFlags now keeps track of the current build platform, and
the PositionIndependentCode module uses this to decide what
to do instead of relying of #ifdefs.
- It's not totally retargetable yet. Some info info about the
build target is still hardwired, but I've tried to contain
most of it to a single module, TargetRegs.
- Moved the SPILL and RELOAD instructions into LiveInstr.
- Reg and RegClass now have their own modules, and are shared
across all architectures.
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* Also fix a nasty bug when creating fixup code that has a cyclic
register movement graph.
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