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* Remove platform CPP from nativeGen/PPC/CodeGen.hsIan Lynagh2011-06-081-116/+135
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* cmmTopCodeGen no longer takes DynFlags as an argumentIan Lynagh2011-06-081-4/+4
| | | | It is in the NatM monad, which has DynFlags as part of its state.
* Whitespace only in nativeGen/PPC/CodeGen.hsIan Lynagh2011-06-081-230/+230
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* Eliminate IF_ARCH_sparcIan Lynagh2011-05-311-3/+1
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* Remove some unused CPP macrosIan Lynagh2011-05-311-6/+1
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* Fix some validation errorsDavid Terei2011-05-311-2/+2
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* Add new mem{cpy,set,move} cmm prim ops.David Terei2011-05-311-3/+18
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* Remove most of the CPP from AsmCodeGenIan Lynagh2011-05-291-1/+5
| | | | | | | | In particular, the "#error" for platforms without a NCG is gone, which means the module should now build on all platforms again. I'm not sure if this is the nicest way to handle multiple platforms here, but it works for now.
* Remove unused pprUserReg functionsIan Lynagh2011-05-081-4/+0
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* Remove dead Alpha native backend.Edward Z. Yang2011-04-301-1/+0
| | | | Signed-off-by: Edward Z. Yang <ezyang@mit.edu>
* Implement jump table fix-ups for linear register allocator.Edward Z. Yang2011-04-273-25/+24
| | | | | | | | | | | | | We achieve this by splitting up instruction selection for case switches into two parts: the actual code generation, and the generation of the accompanying jump table. With this scheme, the jump fixup code can modify the contents of the jump table stored within the JMP_TBL (or BCTL) instruction, before the actual data section is created. SPARC and PPC patches are untested; they might not work! Signed-off-by: Edward Z. Yang <ezyang@mit.edu>
* Merge in new code generator branch.Simon Marlow2011-01-245-24/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | This changes the new code generator to make use of the Hoopl package for dataflow analysis. Hoopl is a new boot package, and is maintained in a separate upstream git repository (as usual, GHC has its own lagging darcs mirror in http://darcs.haskell.org/packages/hoopl). During this merge I squashed recent history into one patch. I tried to rebase, but the history had some internal conflicts of its own which made rebase extremely confusing, so I gave up. The history I squashed was: - Update new codegen to work with latest Hoopl - Add some notes on new code gen to cmm-notes - Enable Hoopl lag package. - Add SPJ note to cmm-notes - Improve GC calls on new code generator. Work in this branch was done by: - Milan Straka <fox@ucw.cz> - John Dias <dias@cs.tufts.edu> - David Terei <davidterei@gmail.com> Edward Z. Yang <ezyang@mit.edu> merged in further changes from GHC HEAD and fixed a few bugs.
* Add new LLVM code generator to GHC. (Version 2)David Terei2010-06-152-22/+6
| | | | | | | | | | | | | | | | | | This was done as part of an honours thesis at UNSW, the paper describing the work and results can be found at: http://www.cse.unsw.edu.au/~pls/thesis/davidt-thesis.pdf A Homepage for the backend can be found at: http://hackage.haskell.org/trac/ghc/wiki/Commentary/Compiler/Backends/LLVM Quick summary of performance is that for the 'nofib' benchmark suite, runtimes are within 5% slower than the NCG and generally better than the C code generator. For some code though, such as the DPH projects benchmark, the LLVM code generator outperforms the NCG and C code generator by about a 25% reduction in run times.
* PIC support for PowerPCpho@cielonegro.org2010-05-081-0/+5
| | | | | PPC.CodeGen.getRegister was not properly handling PicBaseReg. It seems working with this patch, but I'm not sure this change is correct.
* Fix error compiling AsmCodeGen.lhs for PPC Mac (DestBlockId)naur@post11.tele.dk2010-04-031-1/+1
| | | | | | The error message eliminated is: > compiler/nativeGen/AsmCodeGen.lhs:637:16: > Not in scope: data constructor `DestBlockId'
* Implement SSE2 floating-point support in the x86 native code generator (#594)Simon Marlow2010-02-042-23/+7
| | | | | | | | | | | | | | | | | | | | | The new flag -msse2 enables code generation for SSE2 on x86. It results in substantially faster floating-point performance; the main reason for doing this was that our x87 code generation is appallingly bad, and since we plan to drop -fvia-C soon, we need a way to generate half-decent floating-point code. The catch is that SSE2 is only available on CPUs that support it (P4+, AMD K8+). We'll have to think hard about whether we should enable it by default for the libraries we ship. In the meantime, at least -msse2 should be an acceptable replacement for "-fvia-C -optc-ffast-math -fexcess-precision". SSE2 also has the advantage of performing all operations at the correct precision, so floating-point results are consistent with other platforms. I also tweaked the x87 code generation a bit while I was here, now it's slighlty less bad than before.
* Follow ForeignLabel changes in PPC NCGBen.Lippmeier@anu.edu.au2010-01-021-1/+1
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* RTS tidyup sweep, first phaseSimon Marlow2009-08-022-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first phase of this tidyup is focussed on the header files, and in particular making sure we are exposinng publicly exactly what we need to, and no more. - Rts.h now includes everything that the RTS exposes publicly, rather than a random subset of it. - Most of the public header files have moved into subdirectories, and many of them have been renamed. But clients should not need to include any of the other headers directly, just #include the main public headers: Rts.h, HsFFI.h, RtsAPI.h. - All the headers needed for via-C compilation have moved into the stg subdirectory, which is self-contained. Most of the headers for the rest of the RTS APIs have moved into the rts subdirectory. - I left MachDeps.h where it is, because it is so widely used in Haskell code. - I left a deprecated stub for RtsFlags.h in place. The flag structures are now exposed by Rts.h. - Various internal APIs are no longer exposed by public header files. - Various bits of dead code and declarations have been removed - More gcc warnings are turned on, and the RTS code is more warning-clean. - More source files #include "PosixSource.h", and hence only use standard POSIX (1003.1c-1995) interfaces. There is a lot more tidying up still to do, this is just the first pass. I also intend to standardise the names for external RTS APIs (e.g use the rts_ prefix consistently), and declare the internal APIs as hidden for shared libraries.
* Follow vreg/hreg patch in PPC NCGBen.Lippmeier@anu.edu.au2009-05-265-49/+113
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* Split Reg into vreg/hreg and add register pairsBen.Lippmeier@anu.edu.au2009-05-185-65/+69
| | | | | | | | | | | | | * The old Reg type is now split into VirtualReg and RealReg. * For the graph coloring allocator, the type of the register graph is now (Graph VirtualReg RegClass RealReg), which shows that it colors in nodes representing virtual regs with colors representing real regs. (as was intended) * RealReg contains two contructors, RealRegSingle and RealRegPair, where RealRegPair is used to represent a SPARC double reg constructed from two single precision FP regs. * On SPARC we can now allocate double regs into an arbitrary register pair, instead of reserving some reg ranges to only hold float/double values.
* NCG: validate fixes for ppc-darwinBen.Lippmeier@anu.edu.au2009-02-151-0/+6
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* NCG: Validate fixes for x86-linuxBen.Lippmeier@anu.edu.au2009-02-151-1/+6
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* NCG: Split up the native code generator into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-156-385/+1949
| | | | | | | | | | | | | | | | | | | | | | | | | | | - nativeGen/Instruction defines a type class for a generic instruction set. Each of the instruction sets we have, X86, PPC and SPARC are instances of it. - The register alloctors use this type class when they need info about a certain register or instruction, such as regUsage, mkSpillInstr, mkJumpInstr, patchRegs.. - nativeGen/Platform defines some data types enumerating the architectures and operating systems supported by the native code generator. - DynFlags now keeps track of the current build platform, and the PositionIndependentCode module uses this to decide what to do instead of relying of #ifdefs. - It's not totally retargetable yet. Some info info about the build target is still hardwired, but I've tried to contain most of it to a single module, TargetRegs. - Moved the SPILL and RELOAD instructions into LiveInstr. - Reg and RegClass now have their own modules, and are shared across all architectures.
* SPARC NCG: Enumerate freeRegs / globalRegMaybe instead of using #ifdeferyBen.Lippmeier@anu.edu.au2009-02-111-1/+1
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* NCG: Split PprMach into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-051-0/+635
| | | | | | - There are still some #ifdefs for choosing between i386, x86_64, linux, darwin and other OS's. - Also reformat SPARC.RegInfo to remove some of the visual noise.
* NCG: Validate fixes for powerpcBen.Lippmeier@anu.edu.au2009-02-131-1/+1
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* NCG: Add missing ops to powerpc isJumpishBen.Lippmeier@anu.edu.au2009-02-131-0/+3
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* NCG: Validate fixesBen.Lippmeier@anu.edu.au2009-02-051-29/+29
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* NCG: Split RegAllocInfo into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-042-1/+312
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* NCG: Rename MachRegs, MachInstrs -> Regs, Instrs to reflect arch specific namingBen.Lippmeier@anu.edu.au2009-02-041-1/+1
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* NCG: Split MachRegs.hs into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-041-0/+584
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* NCG: Split MachInstrs into arch specific modulesBen.Lippmeier@anu.edu.au2009-02-031-0/+166