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-rw-r--r--libraries/base/Control/Concurrent/MVar.hs12
1 files changed, 6 insertions, 6 deletions
diff --git a/libraries/base/Control/Concurrent/MVar.hs b/libraries/base/Control/Concurrent/MVar.hs
index 393fca89e2..df28fe8406 100644
--- a/libraries/base/Control/Concurrent/MVar.hs
+++ b/libraries/base/Control/Concurrent/MVar.hs
@@ -33,16 +33,16 @@
--
-- === Applicability
--
--- 'MVar's offer more flexibility than 'IORef's, but less flexibility
--- than 'STM'. They are appropriate for building synchronization
+-- 'MVar's offer more flexibility than 'Data.IORef.IORef's, but less flexibility
+-- than 'GHC.Conc.STM'. They are appropriate for building synchronization
-- primitives and performing simple interthread communication; however
-- they are very simple and susceptible to race conditions, deadlocks or
-- uncaught exceptions. Do not use them if you need perform larger
--- atomic operations such as reading from multiple variables: use 'STM'
+-- atomic operations such as reading from multiple variables: use 'GHC.Conc.STM'
-- instead.
--
--- In particular, the "bigger" functions in this module ('readMVar',
--- 'swapMVar', 'withMVar', 'modifyMVar_' and 'modifyMVar') are simply
+-- In particular, the "bigger" functions in this module ('swapMVar',
+-- 'withMVar', 'modifyMVar_' and 'modifyMVar') are simply
-- the composition of a 'takeMVar' followed by a 'putMVar' with
-- exception safety.
-- These only have atomicity guarantees if all other threads
@@ -70,7 +70,7 @@
--
-- 'MVar' operations are always observed to take place in the order
-- they are written in the program, regardless of the memory model of
--- the underlying machine. This is in contrast to 'IORef' operations
+-- the underlying machine. This is in contrast to 'Data.IORef.IORef' operations
-- which may appear out-of-order to another thread in some cases.
--
-- === Example